From: Jan Beulich Date: Fri, 5 Dec 2025 08:10:28 +0000 (+0100) Subject: x86: correct {RD,WR}{FS,GS}BASE {dis,}assembly X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b994ab53f134c93f4654f71d0c14315ebd8e66ae;p=thirdparty%2Fbinutils-gdb.git x86: correct {RD,WR}{FS,GS}BASE {dis,}assembly First they are valid only in 64-bit mode. And then an operand size prefix has no meaning here, hence v_mode is wrong to use; switch to dq_mode. --- diff --git a/gas/testsuite/gas/i386/fsgs-intel.d b/gas/testsuite/gas/i386/fsgs-intel.d deleted file mode 100644 index 84e2ff66084..00000000000 --- a/gas/testsuite/gas/i386/fsgs-intel.d +++ /dev/null @@ -1,27 +0,0 @@ -#objdump: -dwMintel -#name: i386 FSGSBase (Intel disassembly) -#source: fsgs.s - -.*: +file format .* - - -Disassembly of section .text: - -0+ : -[ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx -[ ]*[a-f0-9]+: f3 0f ae cb rdgsbase ebx -[ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase ebx -[ ]*[a-f0-9]+: f3 0f ae db wrgsbase ebx -[ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx -[ ]*[a-f0-9]+: f3 0f ae cb rdgsbase ebx -[ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase ebx -[ ]*[a-f0-9]+: f3 0f ae db wrgsbase ebx -[ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx -[ ]*[a-f0-9]+: f3 0f ae cb rdgsbase ebx -[ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase ebx -[ ]*[a-f0-9]+: f3 0f ae db wrgsbase ebx -[ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx -[ ]*[a-f0-9]+: f3 0f ae cb rdgsbase ebx -[ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase ebx -[ ]*[a-f0-9]+: f3 0f ae db wrgsbase ebx -#pass diff --git a/gas/testsuite/gas/i386/fsgs.d b/gas/testsuite/gas/i386/fsgs.d deleted file mode 100644 index f7b0d0f89bd..00000000000 --- a/gas/testsuite/gas/i386/fsgs.d +++ /dev/null @@ -1,26 +0,0 @@ -#objdump: -dw -#name: i386 FSGSBase - -.*: +file format .* - - -Disassembly of section .text: - -0+ : -[ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae cb rdgsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae db wrgsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae cb rdgsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae db wrgsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae cb rdgsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae db wrgsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae cb rdgsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase %ebx -[ ]*[a-f0-9]+: f3 0f ae db wrgsbase %ebx -#pass diff --git a/gas/testsuite/gas/i386/fsgs.s b/gas/testsuite/gas/i386/fsgs.s deleted file mode 100644 index 92473a84790..00000000000 --- a/gas/testsuite/gas/i386/fsgs.s +++ /dev/null @@ -1,19 +0,0 @@ -# Check FSGSBase new instructions. - - .text -foo: - .rept 2 - rdfsbase %ebx - rdgsbase %ebx - wrfsbase %ebx - wrgsbase %ebx - - .intel_syntax noprefix - rdfsbase ebx - rdgsbase ebx - wrfsbase ebx - wrgsbase ebx - - .att_syntax prefix - .code16 - .endr diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 9b23a7b671d..822e8e15513 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -364,8 +364,6 @@ if [gas_32_check] then { run_dump_test "tbm-16bit" run_dump_test "f16c" run_dump_test "f16c-intel" - run_dump_test "fsgs" - run_dump_test "fsgs-intel" run_dump_test "rdrnd" run_dump_test "rdrnd-intel" run_dump_test "bundle" diff --git a/gas/testsuite/gas/i386/x86-64-fsgs-intel.d b/gas/testsuite/gas/i386/x86-64-fsgs-intel.d index 778f83ddf7b..ba768e80971 100644 --- a/gas/testsuite/gas/i386/x86-64-fsgs-intel.d +++ b/gas/testsuite/gas/i386/x86-64-fsgs-intel.d @@ -1,3 +1,4 @@ +#as: --divide #objdump: -drwMintel #name: x86-64 FSGSBase (Intel mode) #source: x86-64-fsgs.s @@ -24,6 +25,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f3 48 0f ae db wrgsbase rbx [ ]*[a-f0-9]+: f3 41 0f ae d8 wrgsbase r8d [ ]*[a-f0-9]+: f3 49 0f ae d8 wrgsbase r8 +[ ]*[a-f0-9]+: 66 f3 0f ae c1 data16 rdfsbase ecx +[ ]*[a-f0-9]+: f3 66 0f ae d9 data16 wrgsbase ecx [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx [ ]*[a-f0-9]+: f3 48 0f ae c3 rdfsbase rbx [ ]*[a-f0-9]+: f3 41 0f ae c0 rdfsbase r8d diff --git a/gas/testsuite/gas/i386/x86-64-fsgs.d b/gas/testsuite/gas/i386/x86-64-fsgs.d index 0549a3fec84..4ce1e681855 100644 --- a/gas/testsuite/gas/i386/x86-64-fsgs.d +++ b/gas/testsuite/gas/i386/x86-64-fsgs.d @@ -1,3 +1,4 @@ +#as: --divide #objdump: -dw #name: x86-64 FSGSBase @@ -23,6 +24,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: f3 48 0f ae db wrgsbase %rbx [ ]*[a-f0-9]+: f3 41 0f ae d8 wrgsbase %r8d [ ]*[a-f0-9]+: f3 49 0f ae d8 wrgsbase %r8 +[ ]*[a-f0-9]+: 66 f3 0f ae c1 data16 rdfsbase %ecx +[ ]*[a-f0-9]+: f3 66 0f ae d9 data16 wrgsbase %ecx [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx [ ]*[a-f0-9]+: f3 48 0f ae c3 rdfsbase %rbx [ ]*[a-f0-9]+: f3 41 0f ae c0 rdfsbase %r8d diff --git a/gas/testsuite/gas/i386/x86-64-fsgs.s b/gas/testsuite/gas/i386/x86-64-fsgs.s index 8234b85dd8c..3356348f589 100644 --- a/gas/testsuite/gas/i386/x86-64-fsgs.s +++ b/gas/testsuite/gas/i386/x86-64-fsgs.s @@ -19,6 +19,10 @@ foo: wrgsbase %r8d wrgsbase %r8 + data16 rdfsbase %ecx + repe + .insn 0x0fae/3, %cx + .intel_syntax noprefix rdfsbase ebx rdfsbase rbx diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index ac37a96957b..03b51d8bdef 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1358,6 +1358,10 @@ enum X86_64_0F388A, X86_64_0F388B, X86_64_0F38F8_M_1, + X86_64_0FAE_REG_0_MOD_3_PREFIX_1, + X86_64_0FAE_REG_1_MOD_3_PREFIX_1, + X86_64_0FAE_REG_2_MOD_3_PREFIX_1, + X86_64_0FAE_REG_3_MOD_3_PREFIX_1, X86_64_0FC7_REG_6_MOD_3_PREFIX_1, X86_64_VEX_0F3848, @@ -3595,25 +3599,25 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_0FAE_REG_0_MOD_3 */ { { Bad_Opcode }, - { "rdfsbase", { Ev }, 0 }, + { X86_64_TABLE (X86_64_0FAE_REG_0_MOD_3_PREFIX_1) }, }, /* PREFIX_0FAE_REG_1_MOD_3 */ { { Bad_Opcode }, - { "rdgsbase", { Ev }, 0 }, + { X86_64_TABLE (X86_64_0FAE_REG_1_MOD_3_PREFIX_1) }, }, /* PREFIX_0FAE_REG_2_MOD_3 */ { { Bad_Opcode }, - { "wrfsbase", { Ev }, 0 }, + { X86_64_TABLE (X86_64_0FAE_REG_2_MOD_3_PREFIX_1) }, }, /* PREFIX_0FAE_REG_3_MOD_3 */ { { Bad_Opcode }, - { "wrgsbase", { Ev }, 0 }, + { X86_64_TABLE (X86_64_0FAE_REG_3_MOD_3_PREFIX_1) }, }, /* PREFIX_0FAE_REG_4_MOD_0 */ @@ -4707,6 +4711,30 @@ static const struct dis386 x86_64_table[][2] = { { PREFIX_TABLE (PREFIX_0F38F8_M_1_X86_64) }, }, + /* X86_64_0FAE_REG_0_MOD_3_PREFIX_1 */ + { + { Bad_Opcode }, + { "rdfsbase", { Edq }, 0 }, + }, + + /* X86_64_0FAE_REG_1_MOD_3_PREFIX_1 */ + { + { Bad_Opcode }, + { "rdgsbase", { Edq }, 0 }, + }, + + /* X86_64_0FAE_REG_2_MOD_3_PREFIX_1 */ + { + { Bad_Opcode }, + { "wrfsbase", { Edq }, 0 }, + }, + + /* X86_64_0FAE_REG_3_MOD_3_PREFIX_1 */ + { + { Bad_Opcode }, + { "wrgsbase", { Edq }, 0 }, + }, + /* X86_64_0FC7_REG_6_MOD_3_PREFIX_1 */ { { Bad_Opcode }, diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index bc86f2befbb..7b160dc8c87 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -281,6 +281,8 @@ static const dependency isa_dependencies[] = "SSE2" }, { "WIDEKL", "KL" }, + { "FSGSBase", + "64" }, { "PBNDKB", "64" }, { "UINTR", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index bcc670585a3..8b92159ce74 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -2761,7 +2761,7 @@ #define CPU_ANY_64_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, \ 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \ diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 0e9d98c219d..351d2897d7e 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -31664,7 +31664,7 @@ static const insn_template i386_optab[] = { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { 57, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 57, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } } }, @@ -31672,7 +31672,7 @@ static const insn_template i386_optab[] = { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { 57, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 57, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } } }, @@ -31688,7 +31688,7 @@ static const insn_template i386_optab[] = { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { 57, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 57, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } } }, @@ -31696,7 +31696,7 @@ static const insn_template i386_optab[] = { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { 57, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, + { { 57, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } } },