From: Paul Brook Date: Wed, 19 Jul 2006 13:08:21 +0000 (+0000) Subject: 2006-07-19 Paul Brook X-Git-Tag: binutils-csl-sourcerygxx-4_1-17~5 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bd537f75a0788f3b93c6f6860fbb02d694e8b9a9;p=thirdparty%2Fbinutils-gdb.git 2006-07-19 Paul Brook Backport from mainline. gas/ * config/tc-arm.c (insns): Fix rbit Arm opcode. gas/testsuite/ * gas/arm/archv6t2.d: Adjust expected output for rbit. opcodes/ * armd-dis.c (arm_opcodes): Fix rbit opcode. --- diff --git a/ChangeLog.csl b/ChangeLog.csl index 8d1358d6edb..e63f6a1251d 100644 --- a/ChangeLog.csl +++ b/ChangeLog.csl @@ -1,6 +1,16 @@ +2006-07-19 Paul Brook + + Backport from mainline. + gas/ + * config/tc-arm.c (insns): Fix rbit Arm opcode. + gas/testsuite/ + * gas/arm/archv6t2.d: Adjust expected output for rbit. + opcodes/ + * armd-dis.c (arm_opcodes): Fix rbit opcode. + 2006-07-18 Paul Brook - Merge from mainline. + Backport from mainline. bfd/ * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 29c6857950d..07ac1476b01 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -14689,7 +14689,7 @@ static const struct asm_opcode insns[] = TCE(mls, 0600090, fb000010, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mlas, t_mla), TCE(movw, 3000000, f2400000, 2, (RRnpc, HALF), mov16, t_mov16), TCE(movt, 3400000, f2c00000, 2, (RRnpc, HALF), mov16, t_mov16), - TCE(rbit, 3ff0f30, fa90f0a0, 2, (RR, RR), rd_rm, t_rbit), + TCE(rbit, 6ff0f30, fa90f0a0, 2, (RR, RR), rd_rm, t_rbit), TC3(ldrht, 03000b0, f8300e00, 2, (RR, ADDR), ldsttv4, t_ldstt), TC3(ldrsht, 03000f0, f9300e00, 2, (RR, ADDR), ldsttv4, t_ldstt), diff --git a/gas/testsuite/gas/arm/archv6t2.d b/gas/testsuite/gas/arm/archv6t2.d index 8e8b0387a33..a1a4120e453 100644 --- a/gas/testsuite/gas/arm/archv6t2.d +++ b/gas/testsuite/gas/arm/archv6t2.d @@ -24,10 +24,10 @@ Disassembly of section .text: 0+40 <[^>]+> e7a00059 sbfx r0, r9, #0, #1 0+44 <[^>]+> e7a008d0 sbfx r0, r0, #17, #1 0+48 <[^>]+> e7b10050 sbfx r0, r0, #0, #18 -0+4c <[^>]+> e3ff0f30 rbit r0, r0 -0+50 <[^>]+> 13ff0f30 rbitne r0, r0 -0+54 <[^>]+> e3ff9f30 rbit r9, r0 -0+58 <[^>]+> e3ff0f39 rbit r0, r9 +0+4c <[^>]+> e6ff0f30 rbit r0, r0 +0+50 <[^>]+> 16ff0f30 rbitne r0, r0 +0+54 <[^>]+> e6ff9f30 rbit r9, r0 +0+58 <[^>]+> e6ff0f39 rbit r0, r9 0+5c <[^>]+> e0600090 mls r0, r0, r0, r0 0+60 <[^>]+> 10600090 mlsne r0, r0, r0, r0 0+64 <[^>]+> e0690090 mls r9, r0, r0, r0 diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 9092c60527f..434456c568a 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -761,7 +761,7 @@ static const struct opcode32 arm_opcodes[] = {ARM_EXT_V6T2, 0x00300090, 0x0f300090, "ldr%c%6's%5?hbt\t%12-15r, %s"}, {ARM_EXT_V6T2, 0x03000000, 0x0ff00000, "movw%c\t%12-15r, %V"}, {ARM_EXT_V6T2, 0x03400000, 0x0ff00000, "movt%c\t%12-15r, %V"}, - {ARM_EXT_V6T2, 0x03ff0f30, 0x0fff0ff0, "rbit%c\t%12-15r, %0-3r"}, + {ARM_EXT_V6T2, 0x06ff0f30, 0x0fff0ff0, "rbit%c\t%12-15r, %0-3r"}, {ARM_EXT_V6T2, 0x07a00050, 0x0fa00070, "%22?usbfx%c\t%12-15r, %0-3r, #%7-11d, #%16-20W"}, /* ARM V6Z instructions. */