From: Ovidiu Bunea Date: Tue, 15 Jul 2025 21:26:39 +0000 (-0400) Subject: drm/amd/display: Fix dmub_cmd header alignment X-Git-Tag: v6.17.8~612 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bda0b99d00345db636c3dffcb250007540c280c9;p=thirdparty%2Fkernel%2Fstable.git drm/amd/display: Fix dmub_cmd header alignment [ Upstream commit 327aba7f558187e451636c77a1662a2858438dc9 ] [why & how] Header misalignment in struct dmub_cmd_replay_copy_settings_data and struct dmub_alpm_auxless_data causes incorrect data read between driver and dmub. Fix the misalignment and ensure that everything is aligned to 4-byte boundaries. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Ovidiu Bunea Signed-off-by: Ivan Lipski Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 6a69a788abe80..6fa25b0375858 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -4015,6 +4015,10 @@ struct dmub_alpm_auxless_data { uint16_t lfps_t1_t2_override_us; short lfps_t1_t2_offset_us; uint8_t lttpr_count; + /* + * Padding to align structure to 4 byte boundary. + */ + uint8_t pad[1]; }; /** @@ -4092,6 +4096,14 @@ struct dmub_cmd_replay_copy_settings_data { */ struct dmub_alpm_auxless_data auxless_alpm_data; + /** + * @hpo_stream_enc_inst: HPO stream encoder instance + */ + uint8_t hpo_stream_enc_inst; + /** + * @hpo_link_enc_inst: HPO link encoder instance + */ + uint8_t hpo_link_enc_inst; /** * @pad: Align structure to 4 byte boundary. */