From: Julian Seward <jseward@acm.org>
Date: Fri, 20 Apr 2012 02:18:31 +0000 (+0000)
Subject: Fill in some more bits to do with t-chaining for ppc64
X-Git-Tag: svn/VALGRIND_3_8_1^2~182^2~5
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bdc08b44680205fd28e9ed7016e8027850161568;p=thirdparty%2Fvalgrind.git

Fill in some more bits to do with t-chaining for ppc64
(still doesn't work) (VEX side)


git-svn-id: svn://svn.valgrind.org/vex/branches/TCHAIN@2290
---

diff --git a/VEX/priv/host_ppc_defs.c b/VEX/priv/host_ppc_defs.c
index c56f8a1e3e..5e8399025d 100644
--- a/VEX/priv/host_ppc_defs.c
+++ b/VEX/priv/host_ppc_defs.c
@@ -3545,7 +3545,7 @@ Int emit_PPCInstr ( /*MB_MOD*/Bool* is_profInc,
       /* Fix up the conditional jump, if there was one. */
       if (i->Pin.XDirect.cond.test != Pct_ALWAYS) {
          Int delta = p - ptmp;
-         vassert(delta >= 16 && delta <= 32 && 0 == (delta & 3));
+         vassert(delta >= 16 && delta <= 64 && 0 == (delta & 3));
          /* bc !ct,cf,delta */
          mkFormB(ptmp, invertCondTest(i->Pin.XDirect.cond.test),
                  i->Pin.XDirect.cond.flag, (delta>>2), 0, 0);
@@ -4656,7 +4656,7 @@ Int emit_PPCInstr ( /*MB_MOD*/Bool* is_profInc,
    /*NOTREACHED*/
    
   done:
-   vassert(p - &buf[0] <= 32);
+   vassert(p - &buf[0] <= 64);
    return p - &buf[0];
 }
 
diff --git a/VEX/priv/host_ppc_isel.c b/VEX/priv/host_ppc_isel.c
index 04b88126a6..2778dc7c11 100644
--- a/VEX/priv/host_ppc_isel.c
+++ b/VEX/priv/host_ppc_isel.c
@@ -4719,15 +4719,15 @@ static void iselNext ( ISelEnv* env,
 /*---------------------------------------------------------*/
 
 /* Translate an entire SB to ppc code. */
-HInstrArray* iselSB_PPC           ( IRSB* bb, 
-                                    VexArch      arch_host,
-                                    VexArchInfo* archinfo_host,
-                                    VexAbiInfo*  vbi,
-                                    Int offs_Host_EvC_Counter,
-                                    Int offs_Host_EvC_FailAddr,
-                                    Bool chainingAllowed,
-                                    Bool addProfInc,
-                                    Addr64 max_ga )
+HInstrArray* iselSB_PPC ( IRSB* bb, 
+                          VexArch      arch_host,
+                          VexArchInfo* archinfo_host,
+                          VexAbiInfo*  vbi,
+                          Int offs_Host_EvC_Counter,
+                          Int offs_Host_EvC_FailAddr,
+                          Bool chainingAllowed,
+                          Bool addProfInc,
+                          Addr64 max_ga )
 {
    Int       i, j;
    HReg      hregLo, hregMedLo, hregMedHi, hregHi;
@@ -4740,7 +4740,7 @@ HInstrArray* iselSB_PPC           ( IRSB* bb,
 
    vassert(arch_host == VexArchPPC32 || arch_host == VexArchPPC64);
    mode64 = arch_host == VexArchPPC64;
-   if (mode64) vassert(max_ga <= 0xFFFFFFFFULL);
+   if (!mode64) vassert(max_ga <= 0xFFFFFFFFULL);
 
    /* do some sanity checks */
    mask32 = VEX_HWCAPS_PPC32_F | VEX_HWCAPS_PPC32_V
diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c
index 460f443d46..feaf459589 100644
--- a/VEX/priv/main_main.c
+++ b/VEX/priv/main_main.c
@@ -334,7 +334,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta )
          host_word_type    = Ity_I32;
          vassert(are_valid_hwcaps(VexArchPPC32, vta->archinfo_host.hwcaps));
          break;
-#if 0
+
       case VexArchPPC64:
          mode64      = True;
          getAllocableRegs_PPC ( &n_available_real_regs,
@@ -347,16 +347,14 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta )
          ppInstr     = (void(*)(HInstr*, Bool)) ppPPCInstr;
          ppReg       = (void(*)(HReg)) ppHRegPPC;
          iselSB      = iselSB_PPC;
-         emit        = (Int(*)(UChar*,Int,HInstr*,Bool,void*,void*))
+         emit        = (Int(*)(Bool*,UChar*,Int,HInstr*,Bool,
+                               void*,void*,void*,void*))
                        emit_PPCInstr;
          host_is_bigendian = True;
          host_word_type    = Ity_I64;
          vassert(are_valid_hwcaps(VexArchPPC64, vta->archinfo_host.hwcaps));
-         /* return-to-dispatcher scheme */
-         vassert(vta->dispatch_unassisted == NULL);
-         vassert(vta->dispatch_assisted == NULL);
          break;
-#endif
+
       case VexArchS390X:
          mode64      = True;
          getAllocableRegs_S390 ( &n_available_real_regs,
@@ -462,16 +460,20 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta )
          vassert(sizeof( ((VexGuestPPC32State*)0)->guest_TILEN   ) == 4);
          vassert(sizeof( ((VexGuestPPC32State*)0)->guest_NRADDR  ) == 4);
          break;
-#if 0
+
       case VexArchPPC64:
-         preciseMemExnsFn = guest_ppc64_state_requires_precise_mem_exns;
-         disInstrFn       = disInstr_PPC;
-         specHelper       = guest_ppc64_spechelper;
-         guest_sizeB      = sizeof(VexGuestPPC64State);
-         guest_word_type  = Ity_I64;
-         guest_layout     = &ppc64Guest_layout;
-         offB_TISTART     = offsetof(VexGuestPPC64State,guest_TISTART);
-         offB_TILEN       = offsetof(VexGuestPPC64State,guest_TILEN);
+         preciseMemExnsFn       = guest_ppc64_state_requires_precise_mem_exns;
+         disInstrFn             = disInstr_PPC;
+         specHelper             = guest_ppc64_spechelper;
+         guest_sizeB            = sizeof(VexGuestPPC64State);
+         guest_word_type        = Ity_I64;
+         guest_layout           = &ppc64Guest_layout;
+         offB_TISTART           = offsetof(VexGuestPPC64State,guest_TISTART);
+         offB_TILEN             = offsetof(VexGuestPPC64State,guest_TILEN);
+         offB_GUEST_IP          = offsetof(VexGuestPPC64State,guest_CIA);
+         szB_GUEST_IP           = sizeof( ((VexGuestPPC64State*)0)->guest_CIA );
+         offB_HOST_EvC_COUNTER  = offsetof(VexGuestPPC64State,host_EvC_COUNTER);
+         offB_HOST_EvC_FAILADDR = offsetof(VexGuestPPC64State,host_EvC_FAILADDR);
          vassert(are_valid_hwcaps(VexArchPPC64, vta->archinfo_guest.hwcaps));
          vassert(0 == sizeof(VexGuestPPC64State) % 16);
          vassert(sizeof( ((VexGuestPPC64State*)0)->guest_TISTART    ) == 8);
@@ -479,7 +481,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta )
          vassert(sizeof( ((VexGuestPPC64State*)0)->guest_NRADDR     ) == 8);
          vassert(sizeof( ((VexGuestPPC64State*)0)->guest_NRADDR_GPR2) == 8);
          break;
-#endif
+
       case VexArchS390X:
          preciseMemExnsFn = guest_s390x_state_requires_precise_mem_exns;
          disInstrFn       = disInstr_S390;