From: Matt Madison Date: Sat, 23 Sep 2017 00:58:20 +0000 (-0700) Subject: goarch.bbclass: fixups for Go mips32 support X-Git-Tag: lucaceresoli/bug-15201-perf-libtraceevent-missing~19868 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bdd20c296048937737da0f10bd1a3b63843c5bf4;p=thirdparty%2Fopenembedded%2Fopenembedded-core-contrib.git goarch.bbclass: fixups for Go mips32 support * Fix the regular expression in the mips test * Flag as incompatible any mips32 tunes for n32 ABI or soft-float, as go does not support them. * Replace mips32r2 tune with mips32r1. Go only supports mips32r1, which is a strict subset of r2. Adjusting this tune is not ideal, but is hopefully a temporary measure until more complete mips32 ISA coverage arrives upstream. [YOCTO #12108] Signed-off-by: Matt Madison Signed-off-by: Khem Raj Signed-off-by: Richard Purdie --- diff --git a/meta/classes/goarch.bbclass b/meta/classes/goarch.bbclass index 8b95c5fe94b..9ed562d5ab2 100644 --- a/meta/classes/goarch.bbclass +++ b/meta/classes/goarch.bbclass @@ -43,10 +43,14 @@ def go_map_arch(a, d): return 'mips64le' elif re.match('mips64*', a): return 'mips64' - elif re.match('mipsel*', a): - return 'mipsle' - elif re.match('mips*', a): - return 'mips' + elif re.match('mips.*', a): + tf = d.getVar('TUNE_FEATURES').split() + if 'fpu-hard' in tf and 'n32' not in tf: + if 'mips32r2' in tf: + newtf = [t for t in tf if t != 'mips32r2'] + newtf.append('mips32') + d.setVar('TUNE_FEATURES', ' '.join(newtf)) + return 'mips' if 'bigendian' in tf else 'mipsle' elif re.match('p(pc|owerpc)(64)', a): return 'ppc64' elif re.match('p(pc|owerpc)(64el)', a):