From: Richard Henderson Date: Tue, 5 Feb 2019 16:52:36 +0000 (+0000) Subject: target/arm: Introduce isar_feature_aa64_bti X-Git-Tag: v4.0.0-rc0~115^2~21 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=be53b6f4d7ace2e6a018e45af825069ccb7bab66;p=thirdparty%2Fqemu.git target/arm: Introduce isar_feature_aa64_bti Also create field definitions for id_aa64pfr1 from ARMv8.5. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20190128223118.5255-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a68bcc9fedb..0c7ea39f1ae 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1681,6 +1681,11 @@ FIELD(ID_AA64PFR0, GIC, 24, 4) FIELD(ID_AA64PFR0, RAS, 28, 4) FIELD(ID_AA64PFR0, SVE, 32, 4) +FIELD(ID_AA64PFR1, BT, 0, 4) +FIELD(ID_AA64PFR1, SBSS, 4, 4) +FIELD(ID_AA64PFR1, MTE, 8, 4) +FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4) + FIELD(ID_AA64MMFR0, PARANGE, 0, 4) FIELD(ID_AA64MMFR0, ASIDBITS, 4, 4) FIELD(ID_AA64MMFR0, BIGEND, 8, 4) @@ -3328,6 +3333,11 @@ static inline bool isar_feature_aa64_lor(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, LO) != 0; } +static inline bool isar_feature_aa64_bti(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) != 0; +} + /* * Forward to the above feature tests given an ARMCPU pointer. */