From: Eric Biggers Date: Sun, 31 May 2026 19:17:38 +0000 (-0700) Subject: hwrng: xilinx - Move xilinx-rng into drivers/char/hw_random/ X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=be6498ca1cca9084330bdefb68ad8379d1ac5ea7;p=thirdparty%2Flinux.git hwrng: xilinx - Move xilinx-rng into drivers/char/hw_random/ Since this file just implements a hwrng driver, move it into drivers/char/hw_random/. Rename the kconfig option accordingly as well. Signed-off-by: Eric Biggers Signed-off-by: Herbert Xu --- diff --git a/MAINTAINERS b/MAINTAINERS index afad0783395d7..3036d80710af0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -29211,7 +29211,7 @@ XILINX TRNG DRIVER M: Mounika Botcha M: Harsh Jain S: Maintained -F: drivers/crypto/xilinx/xilinx-trng.c +F: drivers/char/hw_random/xilinx-trng.c XILINX UARTLITE SERIAL DRIVER M: Peter Korsgaard diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index cbb0ffe0a9d3a..6745189b1fbc2 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -551,6 +551,7 @@ CONFIG_IPMI_SI=m CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y CONFIG_HW_RANDOM_HISI_TRNG=m +CONFIG_HW_RANDOM_XILINX=m CONFIG_TCG_TPM=y CONFIG_TCG_TIS=m CONFIG_TCG_TIS_SPI=m @@ -1956,7 +1957,6 @@ CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m CONFIG_CRYPTO_DEV_QCE=m CONFIG_CRYPTO_DEV_QCOM_RNG=m CONFIG_CRYPTO_DEV_TEGRA=m -CONFIG_CRYPTO_DEV_XILINX_TRNG=m CONFIG_CRYPTO_DEV_ZYNQMP_AES=m CONFIG_CRYPTO_DEV_ZYNQMP_SHA3=m CONFIG_CRYPTO_DEV_CCREE=m diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 3ea74f208f069..a5bcef4a54eea 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -625,6 +625,17 @@ config HW_RANDOM_ROCKCHIP If unsure, say Y. +config HW_RANDOM_XILINX + tristate "Support for Xilinx True Random Generator" + depends on ZYNQMP_FIRMWARE || COMPILE_TEST + select CRYPTO_LIB_SHA512 + help + Xilinx Versal SoC driver provides kernel-side support for True Random Number + Generator and Pseudo random Number in CTR_DRBG mode as defined in NIST SP800-90A. + + To compile this driver as a module, choose M here: the module + will be called xilinx-trng. + endif # HW_RANDOM config UML_RANDOM diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile index 3e655d6e116b8..95b5adb49560d 100644 --- a/drivers/char/hw_random/Makefile +++ b/drivers/char/hw_random/Makefile @@ -53,3 +53,4 @@ obj-$(CONFIG_HW_RANDOM_CN10K) += cn10k-rng.o obj-$(CONFIG_HW_RANDOM_POLARFIRE_SOC) += mpfs-rng.o obj-$(CONFIG_HW_RANDOM_ROCKCHIP) += rockchip-rng.o obj-$(CONFIG_HW_RANDOM_JH7110) += jh7110-trng.o +obj-$(CONFIG_HW_RANDOM_XILINX) += xilinx-trng.o diff --git a/drivers/crypto/xilinx/xilinx-trng.c b/drivers/char/hw_random/xilinx-trng.c similarity index 100% rename from drivers/crypto/xilinx/xilinx-trng.c rename to drivers/char/hw_random/xilinx-trng.c diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index b94ba934e2d84..216a00bad5d70 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -699,18 +699,6 @@ config CRYPTO_DEV_TEGRA Select this to enable Tegra Security Engine which accelerates various AES encryption/decryption and HASH algorithms. -config CRYPTO_DEV_XILINX_TRNG - tristate "Support for Xilinx True Random Generator" - depends on ZYNQMP_FIRMWARE || COMPILE_TEST - select CRYPTO_LIB_SHA512 - select HW_RANDOM - help - Xilinx Versal SoC driver provides kernel-side support for True Random Number - Generator and Pseudo random Number in CTR_DRBG mode as defined in NIST SP800-90A. - - To compile this driver as a module, choose M here: the module - will be called xilinx-trng. - config CRYPTO_DEV_ZYNQMP_AES tristate "Support for Xilinx ZynqMP AES hw accelerator" depends on ZYNQMP_FIRMWARE || COMPILE_TEST diff --git a/drivers/crypto/xilinx/Makefile b/drivers/crypto/xilinx/Makefile index 9b51636ef75e5..730feff5b5f2f 100644 --- a/drivers/crypto/xilinx/Makefile +++ b/drivers/crypto/xilinx/Makefile @@ -1,4 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_CRYPTO_DEV_XILINX_TRNG) += xilinx-trng.o obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_AES) += zynqmp-aes-gcm.o obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_SHA3) += zynqmp-sha.o