From: Khem Raj <raj.khem@gmail.com>
Date: Fri, 6 Oct 2017 00:50:44 +0000 (-0700)
Subject: runqemu: Add riscv support for qemu machines
X-Git-Tag: lucaceresoli/bug-15201-perf-libtraceevent-missing~19752
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=bfdebfdfc974220fa2893eddbfc966bbc0761d4c;p=thirdparty%2Fopenembedded%2Fopenembedded-core-contrib.git

runqemu: Add riscv support for qemu machines

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
---

diff --git a/scripts/runqemu b/scripts/runqemu
index df762709043..9dc6a05c57f 100755
--- a/scripts/runqemu
+++ b/scripts/runqemu
@@ -1077,6 +1077,10 @@ class BaseConfig(object):
             qbsys = 'mipsel'
         elif mach == 'qemumips64el':
             qbsys = 'mips64el'
+        elif mach == 'qemuriscv64':
+            qbsys = 'riscv64'
+        elif mach == 'qemuriscv32':
+            qbsys = 'riscv32'
 
         return 'qemu-system-%s' % qbsys