From: Julian Seward Date: Thu, 24 Jan 2013 08:55:25 +0000 (+0000) Subject: Fix some HReg/UInt mixups spotted by Florian. X-Git-Tag: svn/VALGRIND_3_9_0^2~138 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c13dcb875cd09c11cf1e5bf118f5e07e00d323c9;p=thirdparty%2Fvalgrind.git Fix some HReg/UInt mixups spotted by Florian. git-svn-id: svn://svn.valgrind.org/vex/trunk@2656 --- diff --git a/VEX/priv/host_amd64_defs.c b/VEX/priv/host_amd64_defs.c index 09515c15a9..39756b44be 100644 --- a/VEX/priv/host_amd64_defs.c +++ b/VEX/priv/host_amd64_defs.c @@ -1961,15 +1961,19 @@ static HReg vreg2ireg ( HReg r ) //uu return mkHReg(n, HRcInt64, False); //uu } -static UChar mkModRegRM ( UChar mod, UChar reg, UChar regmem ) +static UChar mkModRegRM ( UInt mod, UInt reg, UInt regmem ) { + vassert(mod < 4); + vassert((reg|regmem) < 8); return toUChar( ((mod & 3) << 6) | ((reg & 7) << 3) | (regmem & 7) ); } -static UChar mkSIB ( Int shift, Int regindex, Int regbase ) +static UChar mkSIB ( UInt shift, UInt regindex, UInt regbase ) { + vassert(shift < 4); + vassert((regindex|regbase) < 8); return toUChar( ((shift & 3) << 6) | ((regindex & 7) << 3) | (regbase & 7) ); @@ -2094,15 +2098,15 @@ static UChar* doAMode_M ( UChar* p, HReg greg, AMD64AMode* am ) if (fits8bits(am->Aam.IRRS.imm) && am->Aam.IRRS.index != hregAMD64_RSP()) { *p++ = mkModRegRM(1, iregBits210(greg), 4); - *p++ = mkSIB(am->Aam.IRRS.shift, am->Aam.IRRS.index, - am->Aam.IRRS.base); + *p++ = mkSIB(am->Aam.IRRS.shift, iregBits210(am->Aam.IRRS.index), + iregBits210(am->Aam.IRRS.base)); *p++ = toUChar(am->Aam.IRRS.imm & 0xFF); return p; } if (am->Aam.IRRS.index != hregAMD64_RSP()) { *p++ = mkModRegRM(2, iregBits210(greg), 4); - *p++ = mkSIB(am->Aam.IRRS.shift, am->Aam.IRRS.index, - am->Aam.IRRS.base); + *p++ = mkSIB(am->Aam.IRRS.shift, iregBits210(am->Aam.IRRS.index), + iregBits210(am->Aam.IRRS.base)); p = emit32(p, am->Aam.IRRS.imm); return p; } diff --git a/VEX/priv/host_x86_defs.c b/VEX/priv/host_x86_defs.c index ecfaa14744..a01a3deb70 100644 --- a/VEX/priv/host_x86_defs.c +++ b/VEX/priv/host_x86_defs.c @@ -1861,15 +1861,19 @@ static UInt vregNo ( HReg r ) return n; } -static UChar mkModRegRM ( UChar mod, UChar reg, UChar regmem ) +static UChar mkModRegRM ( UInt mod, UInt reg, UInt regmem ) { + vassert(mod < 4); + vassert((reg|regmem) < 8); return toUChar( ((mod & 3) << 6) | ((reg & 7) << 3) | (regmem & 7) ); } -static UChar mkSIB ( Int shift, Int regindex, Int regbase ) +static UChar mkSIB ( UInt shift, UInt regindex, UInt regbase ) { + vassert(shift < 4); + vassert((regindex|regbase) < 8); return toUChar( ((shift & 3) << 6) | ((regindex & 7) << 3) | (regbase & 7) ); @@ -1951,15 +1955,15 @@ static UChar* doAMode_M ( UChar* p, HReg greg, X86AMode* am ) if (fits8bits(am->Xam.IRRS.imm) && am->Xam.IRRS.index != hregX86_ESP()) { *p++ = mkModRegRM(1, iregNo(greg), 4); - *p++ = mkSIB(am->Xam.IRRS.shift, am->Xam.IRRS.index, - am->Xam.IRRS.base); + *p++ = mkSIB(am->Xam.IRRS.shift, iregNo(am->Xam.IRRS.index), + iregNo(am->Xam.IRRS.base)); *p++ = toUChar(am->Xam.IRRS.imm & 0xFF); return p; } if (am->Xam.IRRS.index != hregX86_ESP()) { *p++ = mkModRegRM(2, iregNo(greg), 4); - *p++ = mkSIB(am->Xam.IRRS.shift, am->Xam.IRRS.index, - am->Xam.IRRS.base); + *p++ = mkSIB(am->Xam.IRRS.shift, iregNo(am->Xam.IRRS.index), + iregNo(am->Xam.IRRS.base)); p = emit32(p, am->Xam.IRRS.imm); return p; }