From: Michael Meissner <meissner@linux.ibm.com>
Date: Fri, 3 Sep 2021 18:03:45 +0000 (-0400)
Subject: Make xxsplti*, xpermx, xxeval be vecperm type.
X-Git-Tag: releases/gcc-11.3.0~938
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c464a949e21b926c39325d3de010f6343a95cc84;p=thirdparty%2Fgcc.git

Make xxsplti*, xpermx, xxeval be vecperm type.

Backport from master: 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/altivec.md (xxspltiw_v4si): Use vecperm type
	attribute.  Backport from master, 2021-08-24.
	(xxspltiw_v4si_inst): Likewise.
	(xxspltiw_v4sf_inst): Likewise.
	(xxspltidp_v2df): Likewise.
	(xxspltidp_v2df_inst): Likewise.
	(xxsplti32dx_v4si): Likewise.
	(xxsplti32dx_v4si_inst): Likewise.
	(xxsplti32dx_v4sf_inst): Likewise.
	(xxblend_<mode>): Likewise.
	(xxpermx): Likewise.
	(xxpermx_inst): Likewise.
	(xxeval): Likewise.
---

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index dad3a07841c7..df1d2535046b 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -854,7 +854,7 @@
 		     UNSPEC_XXSPLTIW))]
  "TARGET_POWER10"
  "xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
+ [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")])
 
 (define_expand "xxspltiw_v4sf"
@@ -874,7 +874,7 @@
 		     UNSPEC_XXSPLTIW))]
  "TARGET_POWER10"
  "xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
+ [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")])
 
 (define_expand "xxspltidp_v2df"
@@ -894,7 +894,7 @@
 		     UNSPEC_XXSPLTID))]
   "TARGET_POWER10"
   "xxspltidp %x0,%1"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 (define_expand "xxsplti32dx_v4si"
@@ -914,7 +914,7 @@
 					 GEN_INT (index), operands[3]));
    DONE;
 }
- [(set_attr "type" "vecsimple")])
+ [(set_attr "type" "vecperm")])
 
 (define_insn "xxsplti32dx_v4si_inst"
   [(set (match_operand:V4SI 0 "register_operand" "=wa")
@@ -924,7 +924,7 @@
 		     UNSPEC_XXSPLTI32DX))]
   "TARGET_POWER10"
   "xxsplti32dx %x0,%2,%3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 (define_expand "xxsplti32dx_v4sf"
@@ -953,7 +953,7 @@
 		     UNSPEC_XXSPLTI32DX))]
   "TARGET_POWER10"
   "xxsplti32dx %x0,%2,%3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 (define_insn "xxblend_<mode>"
@@ -964,7 +964,7 @@
 		    UNSPEC_XXBLEND))]
   "TARGET_POWER10"
   "xxblendv<VM3_char> %x0,%x1,%x2,%x3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 (define_expand "xxpermx"
@@ -998,7 +998,7 @@
 
   DONE;
 }
-  [(set_attr "type" "vecsimple")])
+  [(set_attr "type" "vecperm")])
 
 (define_insn "xxpermx_inst"
   [(set (match_operand:V2DI 0 "register_operand" "+v")
@@ -1009,7 +1009,7 @@
 		     UNSPEC_XXPERMX))]
   "TARGET_POWER10"
   "xxpermx %x0,%x1,%x2,%x3,%4"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 (define_expand "vstrir_<mode>"
@@ -3871,7 +3871,7 @@
 		     UNSPEC_XXEVAL))]
    "TARGET_POWER10"
    "xxeval %0,%1,%2,%3,%4"
-   [(set_attr "type" "vecsimple")
+   [(set_attr "type" "vecperm")
     (set_attr "prefixed" "yes")])
 
 (define_expand "vec_unpacku_hi_v16qi"