From: wilco Date: Fri, 11 Oct 2019 14:23:28 +0000 (+0000) Subject: [ARM] Tweak HONOR_REG_ALLOC_ORDER X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c4e18fd5e1adb4bed522f6167caf473cfef3815a;p=thirdparty%2Fgcc.git [ARM] Tweak HONOR_REG_ALLOC_ORDER Setting HONOR_REG_ALLOC_ORDER improves codesize with -Os, however it generates slower and larger code with -O2 and higher. So only set it when optimizing for size. On Cortex-A57 this improves SPECINT2006 by 0.15% and SPECFP2006 by 0.25% while reducing codesize. gcc/ * config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for size. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@276887 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1a8667590439..8118e14b5633 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-10-11 Wilco Dijkstra + + * config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for + size. + 2019-10-11 Bernd Edlinger * tree-vect-loop.c (vect_analyze_loop_operations): Adjust call to diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8b67c9c3657b..5fad1e5bcc2b 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1068,9 +1068,8 @@ extern int arm_regs_in_sequence[]; /* Use different register alloc ordering for Thumb. */ #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc () -/* Tell IRA to use the order we define rather than messing it up with its - own cost calculations. */ -#define HONOR_REG_ALLOC_ORDER 1 +/* Tell IRA to use the order we define when optimizing for size. */ +#define HONOR_REG_ALLOC_ORDER optimize_function_for_size_p (cfun) /* Interrupt functions can only use registers that have already been saved by the prologue, even if they would normally be