From: Kito Cheng <kito.cheng@sifive.com>
Date: Wed, 22 Feb 2023 09:16:20 +0000 (+0800)
Subject: RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c
X-Git-Tag: basepoints/gcc-14~932
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c57fbdd6f11de2916fd0df6553e35117d3d12c5a;p=thirdparty%2Fgcc.git

RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c

LTO might generate random string for the section name, which might contain `mv`,
then might cause random false alarm.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/_Float16-zhinxmin-1.c: Tweak test
	condition.
---

diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
index 0070ebf616cd..fa049db5b932 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
@@ -5,6 +5,6 @@ _Float16 foo1 (_Float16 a, _Float16 b)
 {
     /* { dg-final { scan-assembler-not "fmv.h" } } */
     /* { dg-final { scan-assembler-not "fmv.s" } } */
-    /* { dg-final { scan-assembler-times "mv" 1 } } */
+    /* { dg-final { scan-assembler-times "mv\ta0" 1 } } */
     return b;
 }