From: Julian Seward <jseward@acm.org>
Date: Thu, 2 Oct 2014 16:13:20 +0000 (+0000)
Subject: Add folding rules for: Sar64(x,0) and Sar32(x,0).  Immediate
X-Git-Tag: svn/VALGRIND_3_11_0^2~187
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c5f6b8dda84f38bc7c0fcc2d1c2dd06684ce2829;p=thirdparty%2Fvalgrind.git

Add folding rules for: Sar64(x,0) and Sar32(x,0).  Immediate
shifts by zero seem to have a surprisingly large perf hit on
Intels, possibly due to the bizarre eflags/rflags semantics
involved.



git-svn-id: svn://svn.valgrind.org/vex/trunk@2964
---

diff --git a/VEX/priv/ir_opt.c b/VEX/priv/ir_opt.c
index d132efca27..0779e6135b 100644
--- a/VEX/priv/ir_opt.c
+++ b/VEX/priv/ir_opt.c
@@ -2075,7 +2075,8 @@ static IRExpr* fold_Expr ( IRExpr** env, IRExpr* e )
             case Iop_Shl32:
             case Iop_Shl64:
             case Iop_Shr64:
-               /* Shl32/Shl64/Shr64(x,0) ==> x */
+            case Iop_Sar64:
+               /* Shl32/Shl64/Shr64/Sar64(x,0) ==> x */
                if (isZeroU(e->Iex.Binop.arg2)) {
                   e2 = e->Iex.Binop.arg1;
                   break;
@@ -2087,8 +2088,9 @@ static IRExpr* fold_Expr ( IRExpr** env, IRExpr* e )
                }
                break;
 
+            case Iop_Sar32:
             case Iop_Shr32:
-               /* Shr32(x,0) ==> x */
+               /* Shr32/Sar32(x,0) ==> x */
                if (isZeroU(e->Iex.Binop.arg2)) {
                   e2 = e->Iex.Binop.arg1;
                   break;