From: Carl Love Date: Wed, 2 Oct 2013 16:28:57 +0000 (+0000) Subject: IBM POWER PC, Add the Transactional Memory test case X-Git-Tag: svn/VALGRIND_3_9_0~84 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c6765a43dc0f398ac470b52b5235fd4dafb8b5d7;p=thirdparty%2Fvalgrind.git IBM POWER PC, Add the Transactional Memory test case The test case for the transaction memory instructions executes the failure path when run under valgrind. This is since the initial Transaction Memory implemnetation is to simply fail the TBEGIN instruction forcing the execution flow to take the failure path. When the test case is executed on the real hardware, the success path will be taken. Only the TBEGIN instruction actually does anything. All other transactional memory instructions are NOPs since only failure path is executed and it assumed to not have any transactional memory instructions on it. Signed-off-by: Carl Love VEX commit revision 2780 Bugzilla 323803 git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13607 --- diff --git a/none/tests/ppc32/Makefile.am b/none/tests/ppc32/Makefile.am index 1ec91a35a3..a8b20194c2 100644 --- a/none/tests/ppc32/Makefile.am +++ b/none/tests/ppc32/Makefile.am @@ -41,7 +41,8 @@ EXTRA_DIST = \ jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \ jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \ jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.stdout.exp jm_int_isa_2_07.vgtest \ - test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest + test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest \ + test_tm.stderr.exp test_tm.stdout.exp test_tm.vgtest check_PROGRAMS = \ @@ -55,8 +56,8 @@ check_PROGRAMS = \ test_isa_2_06_part3 \ test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \ test_isa_2_07_part1 \ - test_isa_2_07_part2 - + test_isa_2_07_part2 \ + test_tm AM_CFLAGS += @FLAG_M32@ AM_CXXFLAGS += @FLAG_M32@ @@ -127,3 +128,6 @@ test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $( test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(ISA_2_07_FLAG) \ @FLAG_M32@ $(BUILD_FLAGS_ISA_2_07) + +test_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mhtm -mregnames $(ISA_2_07_FLAG) \ + @FLAG_M32@ $(BUILD_FLAGS_ISA_2_07) diff --git a/none/tests/ppc32/test_tm.c b/none/tests/ppc32/test_tm.c new file mode 120000 index 0000000000..afe15af99b --- /dev/null +++ b/none/tests/ppc32/test_tm.c @@ -0,0 +1 @@ +../ppc64/test_tm.c \ No newline at end of file diff --git a/none/tests/ppc32/test_tm.stderr.exp b/none/tests/ppc32/test_tm.stderr.exp new file mode 100644 index 0000000000..139597f9cb --- /dev/null +++ b/none/tests/ppc32/test_tm.stderr.exp @@ -0,0 +1,2 @@ + + diff --git a/none/tests/ppc32/test_tm.stdout.exp b/none/tests/ppc32/test_tm.stdout.exp new file mode 100644 index 0000000000..72dded9813 --- /dev/null +++ b/none/tests/ppc32/test_tm.stdout.exp @@ -0,0 +1 @@ +ret = 20, expected = 10 diff --git a/none/tests/ppc32/test_tm.vgtest b/none/tests/ppc32/test_tm.vgtest new file mode 100644 index 0000000000..977c326a52 --- /dev/null +++ b/none/tests/ppc32/test_tm.vgtest @@ -0,0 +1,2 @@ +prereq: ../../../tests/check_isa-2_07_cap +prog: test_tm diff --git a/none/tests/ppc64/Makefile.am b/none/tests/ppc64/Makefile.am index ca8b1ac2e7..8ed6877b19 100644 --- a/none/tests/ppc64/Makefile.am +++ b/none/tests/ppc64/Makefile.am @@ -29,14 +29,16 @@ EXTRA_DIST = \ jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \ jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \ jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.stdout.exp jm_int_isa_2_07.vgtest \ - test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest + test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest \ + test_tm.stderr.exp test_tm.stdout.exp test_tm.vgtest check_PROGRAMS = \ allexec \ jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp \ power6_mf_gpr test_isa_2_06_part1 test_isa_2_06_part2 \ test_isa_2_06_part3 test_dfp1 test_dfp2 test_dfp3 test_dfp4 \ - test_dfp5 test_isa_2_07_part1 test_isa_2_07_part2 + test_dfp5 test_isa_2_07_part1 test_isa_2_07_part2 \ + test_tm AM_CFLAGS += @FLAG_M64@ AM_CXXFLAGS += @FLAG_M64@ @@ -105,3 +107,6 @@ test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $( test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(ISA_2_07_FLAG) \ @FLAG_M64@ $(BUILD_FLAGS_ISA_2_07) + +test_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mhtm -mregnames $(ISA_2_07_FLAG) \ + @FLAG_M64@ $(BUILD_FLAGS_ISA_2_07) diff --git a/none/tests/ppc64/test_tm.c b/none/tests/ppc64/test_tm.c new file mode 100644 index 0000000000..87306c1b4c --- /dev/null +++ b/none/tests/ppc64/test_tm.c @@ -0,0 +1,19 @@ +#include +int __attribute__ ((noinline)) htm_begin (int r3, int r4) +{ + int ret; + + if (__builtin_tbegin (0)) { + ret = r3; + __builtin_tend (0); + } else { + ret = r4; + } return ret; +} + +int main (void) { + int ret; + ret = htm_begin (10, 20); + printf ("ret = %d, expected = 10\n", ret); + return 0; +} diff --git a/none/tests/ppc64/test_tm.stderr.exp b/none/tests/ppc64/test_tm.stderr.exp new file mode 100644 index 0000000000..139597f9cb --- /dev/null +++ b/none/tests/ppc64/test_tm.stderr.exp @@ -0,0 +1,2 @@ + + diff --git a/none/tests/ppc64/test_tm.stdout.exp b/none/tests/ppc64/test_tm.stdout.exp new file mode 100644 index 0000000000..72dded9813 --- /dev/null +++ b/none/tests/ppc64/test_tm.stdout.exp @@ -0,0 +1 @@ +ret = 20, expected = 10 diff --git a/none/tests/ppc64/test_tm.vgtest b/none/tests/ppc64/test_tm.vgtest new file mode 100644 index 0000000000..977c326a52 --- /dev/null +++ b/none/tests/ppc64/test_tm.vgtest @@ -0,0 +1,2 @@ +prereq: ../../../tests/check_isa-2_07_cap +prog: test_tm