From: Marc Kleine-Budde Date: Thu, 19 Mar 2026 16:55:40 +0000 (+0100) Subject: spi: spi-fsl-lpspi: fsl_lpspi_set_cmd(): use FIELD_PREP to encode Transmit Command... X-Git-Tag: v7.1-rc1~153^2~39 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c6e178460434e6dad2b948f501cc6811a2e6de8f;p=thirdparty%2Fkernel%2Flinux.git spi: spi-fsl-lpspi: fsl_lpspi_set_cmd(): use FIELD_PREP to encode Transmit Command register Instead of open coding mask and shift operations and to increase readability use FIELD_PREP() to encode the Transmit Command register. Signed-off-by: Marc Kleine-Budde Link: https://patch.msgid.link/20260319-spi-fsl-lpspi-cleanups-v2-6-02b56c5d44a8@pengutronix.de Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index f35273d389c8b..25e6572270132 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -81,10 +81,14 @@ #define RSR_RXEMPTY BIT(1) #define TCR_CPOL BIT(31) #define TCR_CPHA BIT(30) +#define TCR_MODE GENMASK(31, 30) +#define TCR_PRESCALE GENMASK(29, 27) +#define TCR_PCS GENMASK(25, 24) #define TCR_CONT BIT(21) #define TCR_CONTC BIT(20) #define TCR_RXMSK BIT(19) #define TCR_TXMSK BIT(18) +#define TCR_FRAMESZ GENMASK(11, 0) #define SR_CLEAR_MASK GENMASK(13, 8) @@ -288,10 +292,10 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi) { u32 temp = 0; - temp |= fsl_lpspi->config.bpw - 1; - temp |= (fsl_lpspi->config.chip_select & 0x3) << 24; + temp |= FIELD_PREP(TCR_FRAMESZ, fsl_lpspi->config.bpw - 1); + temp |= FIELD_PREP(TCR_PCS, fsl_lpspi->config.chip_select); if (!fsl_lpspi->is_target) { - temp |= fsl_lpspi->config.prescale << 27; + temp |= FIELD_PREP(TCR_PRESCALE, fsl_lpspi->config.prescale); /* * Set TCR_CONT will keep SS asserted after current transfer. * For the first transfer, clear TCR_CONTC to assert SS.