From: Marek Vasut Date: Sun, 18 Jan 2026 13:49:54 +0000 (+0100) Subject: arm64: dts: renesas: r8a77990: Add USB 3.0 PHY and USB3S0 clock nodes X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c6ffd326277aa87138ee6ed4fc4e6f8af1106179;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: renesas: r8a77990: Add USB 3.0 PHY and USB3S0 clock nodes Add USB 3.0 PHY and PHY clock node for R-Car E3. The PHY node is different in that it does not have control registers and extal clock, which are not routed to the SoC pads on R-Car E3, therefore describe the PHY as usb-nop-xceiv simple PHY. Add USB3S0 clock pad fixed-clock node, the frequency has to be overridden at board level. Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260118135038.8033-7-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven --- diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 39824ba6e6d5b..fadb5f4effcf0 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -2190,4 +2190,21 @@ ; interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; + + /* External USB clock - to be overridden by boards that provide it */ + usb3s0_clk: usb3s0-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + usb3_phy0: usb-phy { + compatible = "usb-nop-xceiv"; + clocks = <&usb3s0_clk>; + clock-names = "main_clk"; + clock-frequency = <100000000>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + #phy-cells = <0>; + status = "disabled"; + }; };