From: Jakub Jelinek Date: Tue, 30 May 2017 08:08:24 +0000 (+0200) Subject: backport: re PR rtl-optimization/79901 (ICE in prepare_cmp_insn, at optabs.c:3904) X-Git-Tag: releases/gcc-5.5.0~258 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c74d036337754929094edc68dd0a4409244f9330;p=thirdparty%2Fgcc.git backport: re PR rtl-optimization/79901 (ICE in prepare_cmp_insn, at optabs.c:3904) Backported from mainline 2017-03-07 Jakub Jelinek PR rtl-optimization/79901 * config/i386/sse.md (*avx512bw_3): Renamed to ... (*avx512f_3): ... this. (3 with maxmin code iterator): Use VI8_AVX2_AVX512F iterator instead of VI8_AVX2_AVX512BW. * gcc.target/i386/pr79901.c: New test. From-SVN: r248655 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6eb34c77a833..25502207240d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -3,6 +3,13 @@ Backported from mainline 2017-03-07 Jakub Jelinek + PR rtl-optimization/79901 + * config/i386/sse.md (*avx512bw_3): Renamed to + ... + (*avx512f_3): ... this. + (3 with maxmin code iterator): Use VI8_AVX2_AVX512F + iterator instead of VI8_AVX2_AVX512BW. + PR rtl-optimization/79901 * expr.c (expand_expr_real_2): For vector MIN/MAX, if there is no min/max expander, expand it using expand_vec_cond_expr. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 23e07749977b..1c9aa44dd153 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -10178,7 +10178,7 @@ "TARGET_AVX512F" "ix86_fixup_binary_operands_no_copy (, mode, operands);") -(define_insn "*avx512bw_3" +(define_insn "*avx512f_3" [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v") (maxmin:VI48_AVX512VL (match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v") @@ -10202,10 +10202,10 @@ (set_attr "mode" "")]) (define_expand "3" - [(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand") - (maxmin:VI8_AVX2_AVX512BW - (match_operand:VI8_AVX2_AVX512BW 1 "register_operand") - (match_operand:VI8_AVX2_AVX512BW 2 "register_operand")))] + [(set (match_operand:VI8_AVX2_AVX512F 0 "register_operand") + (maxmin:VI8_AVX2_AVX512F + (match_operand:VI8_AVX2_AVX512F 1 "register_operand") + (match_operand:VI8_AVX2_AVX512F 2 "register_operand")))] "TARGET_SSE4_2" { if (TARGET_AVX512F diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 78fbbe328ae8..656f9ca647b9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,6 +1,11 @@ 2017-05-30 Jakub Jelinek Backported from mainline + 2017-03-07 Jakub Jelinek + + PR rtl-optimization/79901 + * gcc.target/i386/pr79901.c: New test. + 2017-03-03 Jakub Jelinek PR target/79807 diff --git a/gcc/testsuite/gcc.target/i386/pr79901.c b/gcc/testsuite/gcc.target/i386/pr79901.c new file mode 100644 index 000000000000..6fdcf7673628 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr79901.c @@ -0,0 +1,22 @@ +/* PR rtl-optimization/79901 */ +/* { dg-do compile } */ +/* { dg-options "-O3 -mavx512f -fno-ssa-phiopt" } */ + +unsigned int +foo (const unsigned long long x) +{ + if (x < 0) + return 0; + else if ( x > ~0U) + return ~0U; + else + return (unsigned int) x; +} + +void +bar (unsigned x, unsigned int *y, unsigned int z) +{ + unsigned i; + for (i = 0; i < x; i++) + y[i] = foo (y[i] * (unsigned long long) z); +}