From: Peter Putzer <openwrt@mundschenk.at>
Date: Sat, 25 Jul 2026 10:10:42 +0000 (+0000)
Subject: realtek: refactor GS1900-8HP variants to have common definitions
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c775a6b71642cd13bccfe8976fd54247cd9dd13d;p=thirdparty%2Fopenwrt.git

realtek: refactor GS1900-8HP variants to have common definitions

Moves common definitions to separate include file.

Signed-off-by: Peter Putzer <openwrt@mundschenk.at>
Link: https://github.com/openwrt/openwrt/pull/24418
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
---

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-a1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-a1.dts
index 88e76c9774a..1ebc7631014 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-a1.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-a1.dts
@@ -1,41 +1,13 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+#include "rtl8380_zyxel_gs1900-8hp.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-8hp-a1", "realtek,rtl838x-soc";
 	model = "Zyxel GS1900-8HP A1 Switch";
 };
 
-&uart1 {
-	status = "okay";
-
-	pse: ethernet-pse {
-		compatible = "zyxel,gs1900-8hp-a1-pse", "realtek,pse-mcu-gen1";
-		current-speed = <19200>;
-
-		pse-pis {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			PSE_PI(0)
-			PSE_PI(1)
-			PSE_PI(2)
-			PSE_PI(3)
-			PSE_PI(4)
-			PSE_PI(5)
-			PSE_PI(6)
-			PSE_PI(7)
-		};
-	};
+&pse {
+	compatible = "zyxel,gs1900-8hp-a1-pse", "realtek,pse-mcu-gen1";
+	current-speed = <19200>;
 };
-
-&phy8 { pses = <&pse_pi0>; };
-&phy9 { pses = <&pse_pi1>; };
-&phy10 { pses = <&pse_pi2>; };
-&phy11 { pses = <&pse_pi3>; };
-&phy12 { pses = <&pse_pi4>; };
-&phy13 { pses = <&pse_pi5>; };
-&phy14 { pses = <&pse_pi6>; };
-&phy15 { pses = <&pse_pi7>; };
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-b1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-b1.dts
index 8987fd1d736..8ee34dc699b 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-b1.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-b1.dts
@@ -1,41 +1,13 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+#include "rtl8380_zyxel_gs1900-8hp.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-8hp-b1", "realtek,rtl838x-soc";
 	model = "Zyxel GS1900-8HP B1 Switch";
 };
 
-&uart1 {
-	status = "okay";
-
-	pse: ethernet-pse {
-		compatible = "zyxel,gs1900-8hp-b1-pse", "realtek,pse-mcu-gen1";
-		current-speed = <19200>;
-
-		pse-pis {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			PSE_PI(0)
-			PSE_PI(1)
-			PSE_PI(2)
-			PSE_PI(3)
-			PSE_PI(4)
-			PSE_PI(5)
-			PSE_PI(6)
-			PSE_PI(7)
-		};
-	};
+&pse {
+	compatible = "zyxel,gs1900-8hp-b1-pse", "realtek,pse-mcu-gen1";
+	current-speed = <19200>;
 };
-
-&phy8 { pses = <&pse_pi0>; };
-&phy9 { pses = <&pse_pi1>; };
-&phy10 { pses = <&pse_pi2>; };
-&phy11 { pses = <&pse_pi3>; };
-&phy12 { pses = <&pse_pi4>; };
-&phy13 { pses = <&pse_pi5>; };
-&phy14 { pses = <&pse_pi6>; };
-&phy15 { pses = <&pse_pi7>; };
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp.dtsi
new file mode 100644
index 00000000000..1eab58f3ba0
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+&uart1 {
+	status = "okay";
+
+	/* PoE MCU; compatible and current-speed are set per variant */
+	pse: ethernet-pse {
+		pse-pis {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			PSE_PI(0)
+			PSE_PI(1)
+			PSE_PI(2)
+			PSE_PI(3)
+			PSE_PI(4)
+			PSE_PI(5)
+			PSE_PI(6)
+			PSE_PI(7)
+		};
+	};
+};
+
+&phy8 { pses = <&pse_pi0>; };
+&phy9 { pses = <&pse_pi1>; };
+&phy10 { pses = <&pse_pi2>; };
+&phy11 { pses = <&pse_pi3>; };
+&phy12 { pses = <&pse_pi4>; };
+&phy13 { pses = <&pse_pi5>; };
+&phy14 { pses = <&pse_pi6>; };
+&phy15 { pses = <&pse_pi7>; };