From: Peter Bergner Date: Wed, 21 Jan 2026 17:45:12 +0000 (-0600) Subject: RISC-V: Add zvfbfmin to tt-ascalon-d8's extension list [PR123492] X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c9058b76716aa0cc163c08e7379365c7fdacc57a;p=thirdparty%2Fgcc.git RISC-V: Add zvfbfmin to tt-ascalon-d8's extension list [PR123492] The previous update to Ascalon's extension list missed zvfbfmin. Add it. 2026-01-21 Peter Bergner gcc/ PR target/123492 * config/riscv/riscv-cores.def (RISCV_CORE): Add zvfbfmin to tt-ascalon-d8. Signed-off-by: Peter Bergner --- diff --git a/gcc/config/riscv/riscv-cores.def b/gcc/config/riscv/riscv-cores.def index 6c7b87b5c6b..79a460f8176 100644 --- a/gcc/config/riscv/riscv-cores.def +++ b/gcc/config/riscv/riscv-cores.def @@ -148,8 +148,8 @@ RISCV_CORE("xt-c920v2", "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_" "xtheadsync", "xt-c920v2") -RISCV_CORE("tt-ascalon-d8", "rva23s64_zfbfmin_zfh_zkr_zvbc_zvfbfwma_zvfh_" - "zvkng_zvl256b_smaia_smmpm_smnpm_smrnmi_" +RISCV_CORE("tt-ascalon-d8", "rva23s64_zfbfmin_zfh_zkr_zvbc_zvfbfmin_zvfbfwma_" + "zvfh_zvkng_zvl256b_smaia_smmpm_smnpm_smrnmi_" "smstateen_ssaia_ssstrict_svadu", "tt-ascalon-d8")