From: GCC Administrator Date: Mon, 28 Jul 2025 00:17:10 +0000 (+0000) Subject: Daily bump. X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c92c557308a7aeb8a55539a1ea3c1445f880a6f3;p=thirdparty%2Fgcc.git Daily bump. --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a3238a3dc06..16725827d63 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2025-07-27 Pan Li + + * config/riscv/riscv-v.cc (expand_vx_binary_vxrm_vec_vec_dup): + Add new case UNSPEC_VAADD. + (expand_vx_binary_vxrm_vec_dup_vec): Ditto. + * config/riscv/riscv.cc (riscv_rtx_costs): Ditto. + * config/riscv/vector-iterators.md: Add new case UNSPEC_VAADD to + iterator. + 2025-07-27 Nathaniel Shead PR middle-end/120855 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index bb710d568ca..8ad65ad54e8 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20250727 +20250728 diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 4c7e8d1fd8c..52bd14cb273 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,26 @@ +2025-07-27 Mikael Morin + + PR fortran/121185 + * trans-expr.cc (gfc_trans_assignment_1): Use the same condition + to set the is_alloc_lhs flag and to decide to generate + reallocation code. Add explicit call to gfc_fix_class_refs + before evaluating the condition. + +2025-07-27 Mikael Morin + + PR fortran/121185 + * trans-array.cc (set_factored_descriptor_value): Also trigger + the saving of the previously selected reference on encountering + an INDIRECT_REF. Extract the saving code... + (save_ref): ... here as a new function. + +2025-07-27 Mikael Morin + + PR fortran/121185 + * trans-expr.cc (gfc_get_class_from_expr): Give up class + container lookup on the second COMPONENT_REF after an array + descriptor. + 2025-07-25 David Malcolm * error.cc: Make diagnostics::context::m_source_printing private. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3b5f40c4ccb..6d620093621 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,66 @@ +2025-07-27 Mikael Morin + + PR fortran/121185 + * gfortran.dg/assign_14.f90: New test. + +2025-07-27 Mikael Morin + + PR fortran/121185 + * gfortran.dg/assign_13.f90: New test. + +2025-07-27 Pan Li + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i8.c: New test. + +2025-07-27 Pan Li + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto. + +2025-07-27 Pan Li + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test helper + macros. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test + data for run test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i8.c: New test. + +2025-07-27 Pan Li + + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c: + Add zvfh requirements and options. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c: + Ditto. + 2025-07-27 Nathaniel Shead * g++.dg/modules/class-11_a.H: New test.