From: Jonathan Wright <jonathan.wright@arm.com>
Date: Thu, 22 Apr 2021 14:04:19 +0000 (+0100)
Subject: aarch64: Remove unspecs from [su]qmovn RTL pattern
X-Git-Tag: basepoints/gcc-13~8072
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c99f3747131377956e3bd8e393911c959ef5ff34;p=thirdparty%2Fgcc.git

aarch64: Remove unspecs from [su]qmovn RTL pattern

Saturating truncation can be expressed using the RTL expressions
ss_truncate and us_truncate. This patch changes the implementation
of the vqmovn_* intrinsics to use these RTL expressions rather than
a pair of unspecs. The redundant unspecs are removed along with their
code iterator.

gcc/ChangeLog:

2021-04-12  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Modify comment to
	make consistent with updated RTL pattern.
	* config/aarch64/aarch64-simd.md (aarch64_<sur>qmovn<mode>):
	Implement using ss_truncate and us_truncate rather than
	unspecs.
	* config/aarch64/iterators.md: Remove redundant unspecs and
	iterator: UNSPEC_[SU]QXTN and SUQMOVN respectively.
---

diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index f01a1b439e1f..337ec8d1f108 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -266,7 +266,7 @@
   /* Implemented by aarch64_sqxtun2<mode>.  */
   BUILTIN_VQN (BINOP_UUS, sqxtun2, 0, NONE)
 
-  /* Implemented by aarch64_<sur>qmovn<mode>.  */
+  /* Implemented by aarch64_<su>qmovn<mode>.  */
   BUILTIN_VSQN_HSDI (UNOP, sqmovn, 0, NONE)
   BUILTIN_VSQN_HSDI (UNOP, uqmovn, 0, NONE)
 
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 72f429c75150..fbfed334e97d 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -4591,12 +4591,12 @@
 
 ;; sqmovn and uqmovn
 
-(define_insn "aarch64_<sur>qmovn<mode>"
+(define_insn "aarch64_<su>qmovn<mode>"
   [(set (match_operand:<VNARROWQ> 0 "register_operand" "=w")
-	(unspec:<VNARROWQ> [(match_operand:VSQN_HSDI 1 "register_operand" "w")]
-                            SUQMOVN))]
+	(SAT_TRUNC:<VNARROWQ>
+    (match_operand:VSQN_HSDI 1 "register_operand" "w")))]
   "TARGET_SIMD"
-  "<sur>qxtn\\t%<vn2>0<Vmntype>, %<v>1<Vmtype>"
+  "<su>qxtn\\t%<vn2>0<Vmntype>, %<v>1<Vmtype>"
    [(set_attr "type" "neon_sat_shift_imm_narrow_q")]
 )
 
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 3d66e6384f35..634c44e225c2 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -523,8 +523,6 @@
     UNSPEC_SUQADD	; Used in aarch64-simd.md.
     UNSPEC_SQXTUN	; Used in aarch64-simd.md.
     UNSPEC_SQXTUN2	; Used in aarch64-simd.md.
-    UNSPEC_SQXTN	; Used in aarch64-simd.md.
-    UNSPEC_UQXTN	; Used in aarch64-simd.md.
     UNSPEC_SSRA		; Used in aarch64-simd.md.
     UNSPEC_USRA		; Used in aarch64-simd.md.
     UNSPEC_SRSRA	; Used in aarch64-simd.md.
@@ -2258,8 +2256,6 @@
 
 (define_int_iterator USSUQADD [UNSPEC_SUQADD UNSPEC_USQADD])
 
-(define_int_iterator SUQMOVN [UNSPEC_SQXTN UNSPEC_UQXTN])
-
 (define_int_iterator VSHL [UNSPEC_SSHL UNSPEC_USHL
 		           UNSPEC_SRSHL UNSPEC_URSHL])
 
@@ -2998,7 +2994,6 @@
 		      (UNSPEC_SUBHN "") (UNSPEC_RSUBHN "r")
 		      (UNSPEC_ADDHN2 "") (UNSPEC_RADDHN2 "r")
 		      (UNSPEC_SUBHN2 "") (UNSPEC_RSUBHN2 "r")
-		      (UNSPEC_SQXTN "s") (UNSPEC_UQXTN "u")
 		      (UNSPEC_USQADD "us") (UNSPEC_SUQADD "su")
 		      (UNSPEC_SSLI  "s") (UNSPEC_USLI  "u")
 		      (UNSPEC_SSRI  "s") (UNSPEC_USRI  "u")