From: Richard Sandiford <rsandifo@redhat.com>
Date: Mon, 1 Mar 2004 18:17:35 +0000 (+0000)
Subject: mips.c (mips_output_division): Use the division instruction to fill the delay slot... 
X-Git-Tag: releases/gcc-4.0.0~9716
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c9e0ce371610049698e7af2a065ddea2ede63709;p=thirdparty%2Fgcc.git

mips.c (mips_output_division): Use the division instruction to fill the delay slot of a zero check.

	* config/mips/mips.c (mips_output_division): Use the division
	instruction to fill the delay slot of a zero check.
	(mips_idiv_insns): Adjust accordingly.

From-SVN: r78712
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 266145c430c5..512467ba5276 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
+
+	* config/mips/mips.c (mips_output_division): Use the division
+	instruction to fill the delay slot of a zero check.
+	(mips_idiv_insns): Adjust accordingly.
+
 2004-03-01  Nathanael Nerode  <neroden@gcc.gnu.org>
 
 	* config.gcc: Create a default tmake_file for linux, and use
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 8fdd97918d81..c200af7f1509 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -1359,12 +1359,7 @@ mips_idiv_insns (void)
 
   count = 1;
   if (TARGET_CHECK_ZERO_DIV)
-    {
-      if (TARGET_MIPS16)
-	count += 2;
-      else
-	count += 3;
-    }
+    count += 2;
   if (TARGET_FIX_R4000)
     count++;
   return count;
@@ -9225,16 +9220,22 @@ mips_output_conditional_branch (rtx insn, rtx *operands, int two_operands_p,
 const char *
 mips_output_division (const char *division, rtx *operands)
 {
-  const char *s = division;
+  const char *s;
 
+  s = division;
   if (TARGET_CHECK_ZERO_DIV)
     {
-      output_asm_insn (s, operands);
-
       if (TARGET_MIPS16)
-	s = "bnez\t%2,1f\n\tbreak\t7\n1:";
+	{
+	  output_asm_insn (s, operands);
+	  s = "bnez\t%2,1f\n\tbreak\t7\n1:";
+	}
       else
-	s = "bne\t%2,%.,1f%#\n\tbreak\t7\n1:";
+	{
+	  output_asm_insn ("%(bne\t%2,%.,1f", operands);
+	  output_asm_insn (s, operands);
+	  s = "break\t7%)\n1:";
+	}
     }
   if (TARGET_FIX_R4000)
     {