From: Chad Monroe Date: Tue, 11 Aug 2026 02:57:56 +0000 (-0700) Subject: mediatek: filogic: mt-stuart: move AQR113C reset to MDIO bus level X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cb158aba32366d85616aa9d8f0e220d99f36155e;p=thirdparty%2Fopenwrt.git mediatek: filogic: mt-stuart: move AQR113C reset to MDIO bus level Each board wires one reset line that resets the AQR113C PHYs as a group: GPIO 71 on SDG-8733/SDG-8734 and GPIO 62 on SDG-8733A. Describe that line as the MDIO bus reset with the same assert and deassert times. Drop the per-PHY reset-gpios. On SDG-8733 the second AQR113C claimed GPIO 62, which is not connected on that board. Signed-off-by: Chad Monroe Link: https://github.com/openwrt/openwrt/pull/24352 Signed-off-by: Jonas Jelonek --- diff --git a/target/linux/mediatek/dts/mt7988a-smartrg-SDG-8733.dtsi b/target/linux/mediatek/dts/mt7988a-smartrg-SDG-8733.dtsi index 604ab4d357c..6608286601d 100644 --- a/target/linux/mediatek/dts/mt7988a-smartrg-SDG-8733.dtsi +++ b/target/linux/mediatek/dts/mt7988a-smartrg-SDG-8733.dtsi @@ -18,10 +18,6 @@ compatible = "ethernet-phy-ieee802.3-c45"; reg = <0>; - reset-gpios = <&pio 62 GPIO_ACTIVE_LOW>; - reset-assert-us = <100000>; - reset-deassert-us = <1000000>; - leds { #address-cells = <1>; #size-cells = <0>; diff --git a/target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart-phase1.dtsi b/target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart-phase1.dtsi index 70f8a0af3e2..d85cd0b2dcd 100644 --- a/target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart-phase1.dtsi +++ b/target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart-phase1.dtsi @@ -116,15 +116,15 @@ }; &mdio_bus { + reset-gpios = <&pio 71 GPIO_ACTIVE_LOW>; + reset-delay-us = <100000>; + reset-post-delay-us = <1000000>; + phy8: ethernet-phy@8 { /* AQR113C */ compatible = "ethernet-phy-ieee802.3-c45"; reg = <8>; - reset-gpios = <&pio 71 GPIO_ACTIVE_LOW>; - reset-assert-us = <100000>; - reset-deassert-us = <1000000>; - leds { #address-cells = <1>; #size-cells = <0>; diff --git a/target/linux/mediatek/dts/mt7988d-smartrg-SDG-8733A.dts b/target/linux/mediatek/dts/mt7988d-smartrg-SDG-8733A.dts index 9b4f4956b86..1e7b72e7015 100644 --- a/target/linux/mediatek/dts/mt7988d-smartrg-SDG-8733A.dts +++ b/target/linux/mediatek/dts/mt7988d-smartrg-SDG-8733A.dts @@ -139,15 +139,15 @@ }; &mdio_bus { + reset-gpios = <&pio 62 GPIO_ACTIVE_LOW>; + reset-delay-us = <100000>; + reset-post-delay-us = <1000000>; + phy8: ethernet-phy@8 { /* AQR113C */ compatible = "ethernet-phy-ieee802.3-c45"; reg = <8>; - reset-gpios = <&pio 62 GPIO_ACTIVE_LOW>; - reset-assert-us = <100000>; - reset-deassert-us = <1000000>; - marvell,mdi-cfg-order = <0>; leds {