From: Jakub Jelinek Date: Mon, 9 Sep 2019 11:43:08 +0000 (+0200) Subject: re PR target/91704 ([X86] Codegen for _mm256_cmpgt_epi8 is affected by -funsigned... X-Git-Tag: releases/gcc-7.5.0~136 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cb3e2b248b5d03d06515160c3f81bc666f8d83d5;p=thirdparty%2Fgcc.git re PR target/91704 ([X86] Codegen for _mm256_cmpgt_epi8 is affected by -funsigned-char) PR target/91704 * config/i386/avxintrin.h (__v32qs): New typedef. * config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs instead of __v32qi. * gcc.target/i386/pr91704.c: New test. From-SVN: r275515 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c9012e0ebf6f..94541446508c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-09-09 Jakub Jelinek + + PR target/91704 + * config/i386/avxintrin.h (__v32qs): New typedef. + * config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs + instead of __v32qi. + 2019-09-08 Iain Sandoe Backport from mainline diff --git a/gcc/config/i386/avx2intrin.h b/gcc/config/i386/avx2intrin.h index 82f170a3d61f..1a96eaed13a8 100644 --- a/gcc/config/i386/avx2intrin.h +++ b/gcc/config/i386/avx2intrin.h @@ -258,7 +258,7 @@ extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpgt_epi8 (__m256i __A, __m256i __B) { - return (__m256i) ((__v32qi)__A > (__v32qi)__B); + return (__m256i) ((__v32qs)__A > (__v32qs)__B); } extern __inline __m256i diff --git a/gcc/config/i386/avxintrin.h b/gcc/config/i386/avxintrin.h index 20c5a078a9a5..da1d9dbfc467 100644 --- a/gcc/config/i386/avxintrin.h +++ b/gcc/config/i386/avxintrin.h @@ -47,6 +47,7 @@ typedef unsigned int __v8su __attribute__ ((__vector_size__ (32))); typedef short __v16hi __attribute__ ((__vector_size__ (32))); typedef unsigned short __v16hu __attribute__ ((__vector_size__ (32))); typedef char __v32qi __attribute__ ((__vector_size__ (32))); +typedef signed char __v32qs __attribute__ ((__vector_size__ (32))); typedef unsigned char __v32qu __attribute__ ((__vector_size__ (32))); /* The Intel API is flexible enough that we must allow aliasing with other diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c50e55f15ff1..d5064f48cca3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2019-09-09 Jakub Jelinek + + PR target/91704 + * gcc.target/i386/pr91704.c: New test. + 2019-09-08 Iain Sandoe Backport from mainline. diff --git a/gcc/testsuite/gcc.target/i386/pr91704.c b/gcc/testsuite/gcc.target/i386/pr91704.c new file mode 100644 index 000000000000..b996e24ad749 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr91704.c @@ -0,0 +1,14 @@ +/* PR target/91704 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -funsigned-char -mavx2 -mavx512f -masm=att" } */ +/* { dg-final { scan-assembler-times "\tvpcmpgtb\t%ymm" 1 } } */ +/* { dg-final { scan-assembler-not "\tvpsubusb\t" } } */ +/* { dg-final { scan-assembler-not "\tvpcmpeqb\t" } } */ + +#include + +__m256i +foo (__m256i x, __m256i y) +{ + return _mm256_cmpgt_epi8 (x, y); +}