From: Thomas Preud'homme Date: Wed, 4 Mar 2015 02:06:07 +0000 (+0000) Subject: backport: re PR target/64453 (Live high register not saved in function prolog on... X-Git-Tag: releases/gcc-4.8.5~234 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cc56ba0bca97c97ec39c2accf80d28f588aed7f8;p=thirdparty%2Fgcc.git backport: re PR target/64453 (Live high register not saved in function prolog on ARM with -Os) 2015-03-04 Thomas Preud'homme Backport from mainline 2015-01-14 Thomas Preud'homme gcc/ PR target/64453 * config/arm/arm.c (callee_saved_reg_p): Define. (arm_compute_save_reg0_reg12_mask): Use callee_saved_reg_p to check if register is callee saved instead of !call_used_regs[reg]. (thumb1_compute_save_reg_mask): Likewise. gcc/testsuite/ PR target/64453 * gcc.target/arm/pr64453.c: New. From-SVN: r221170 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dce2ea05ae7b..3671cf1fe822 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2015-03-04 Thomas Preud'homme + + Backport from mainline + 2015-01-14 Thomas Preud'homme + + PR target/64453 + * config/arm/arm.c (callee_saved_reg_p): Define. + (arm_compute_save_reg0_reg12_mask): Use callee_saved_reg_p to check if + register is callee saved instead of !call_used_regs[reg]. + (thumb1_compute_save_reg_mask): Likewise. + 2015-02-27 Richard Biener PR lto/65193 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 90244292f949..346a2c979249 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -15626,6 +15626,14 @@ output_ascii_pseudo_op (FILE *stream, const unsigned char *p, int len) fputs ("\"\n", stream); } +/* Whether a register is callee saved or not. This is necessary because high + registers are marked as caller saved when optimizing for size on Thumb-1 + targets despite being callee saved in order to avoid using them. */ +#define callee_saved_reg_p(reg) \ + (!call_used_regs[reg] \ + || (TARGET_THUMB1 && optimize_size \ + && reg >= FIRST_HI_REGNUM && reg <= LAST_HI_REGNUM)) + /* Compute the register save mask for registers 0 through 12 inclusive. This code is used by arm_compute_save_reg_mask. */ @@ -15686,7 +15694,7 @@ arm_compute_save_reg0_reg12_mask (void) /* In the normal case we only need to save those registers which are call saved and which are used by this function. */ for (reg = 0; reg <= 11; reg++) - if (df_regs_ever_live_p (reg) && ! call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && callee_saved_reg_p (reg)) save_reg_mask |= (1 << reg); /* Handle the frame pointer as a special case. */ @@ -15840,7 +15848,7 @@ thumb1_compute_save_reg_mask (void) mask = 0; for (reg = 0; reg < 12; reg ++) - if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && callee_saved_reg_p (reg)) mask |= 1 << reg; if (flag_pic @@ -15873,7 +15881,7 @@ thumb1_compute_save_reg_mask (void) if (reg * UNITS_PER_WORD <= (unsigned) arm_size_return_regs ()) reg = LAST_LO_REGNUM; - if (! call_used_regs[reg]) + if (callee_saved_reg_p (reg)) mask |= 1 << reg; } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 10317c10a3ef..d0aa70edb629 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-03-04 Thomas Preud'homme + + PR target/64453 + * gcc.target/arm/pr64453.c: New. + 2015-02-27 Richard Biener PR lto/65193 diff --git a/gcc/testsuite/gcc.target/arm/pr64453.c b/gcc/testsuite/gcc.target/arm/pr64453.c new file mode 100644 index 000000000000..17155afc9d79 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr64453.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mthumb -Os " } */ +/* { dg-require-effective-target arm_thumb1_ok } */ + +void save_regs () { + __asm volatile ("" ::: "r8"); +} + +/* { dg-final { scan-assembler "\tmov\tr., r8" } } */