From: Marek Vasut Date: Sun, 14 Jun 2026 01:52:21 +0000 (+0200) Subject: arm64: renesas: Initialize GIC600 fully on R-Car S4/V4H/V4M X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cc5d760ace890b57d78b23aafb47ba220e63ae4f;p=thirdparty%2Fu-boot.git arm64: renesas: Initialize GIC600 fully on R-Car S4/V4H/V4M ARM GIC-600 IP complies with ARM GICv3 architecture, but among others, implements a power control register in the Redistributor frame. This register must be programmed to mark the frame as powered on, before accessing other registers in the frame. Before the switch to generic lowlevel_init function, this did not pose a problem as the previous custom lowlevel_init did not access the GICR registers. The generic function does and that does lead to a hang early in SPL. Enable the GIC600 initialization variant to mitigate the hang. Fixes: 37997a214ed1 ("arm: renesas: Use stock lowlevel_init function and remove s_init") Signed-off-by: Marek Vasut --- diff --git a/arch/arm/mach-renesas/Kconfig.rcar4 b/arch/arm/mach-renesas/Kconfig.rcar4 index 2439501d07e..39814950b1a 100644 --- a/arch/arm/mach-renesas/Kconfig.rcar4 +++ b/arch/arm/mach-renesas/Kconfig.rcar4 @@ -11,12 +11,14 @@ config R8A779A0 config R8A779F0 bool "Renesas SoC R8A779F0" select GICV3 + select GICV3_SUPPORT_GIC600 imply CLK_R8A779F0 imply PINCTRL_PFC_R8A779F0 config R8A779G0 bool "Renesas SoC R8A779G0" select GICV3 + select GICV3_SUPPORT_GIC600 select BINMAN select SUPPORT_SPL imply SPL @@ -33,6 +35,7 @@ config R8A779G0 config R8A779H0 bool "Renesas SoC R8A779H0" select GICV3 + select GICV3_SUPPORT_GIC600 imply CLK_R8A779H0 imply PINCTRL_PFC_R8A779H0