From: Jonathan Cameron Date: Sun, 8 May 2022 17:56:15 +0000 (+0100) Subject: iio: adc: ti-ads131e08: Fix alignment for DMA safety X-Git-Tag: v5.18.18~478 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ccb680b0d421af28e8e96eb96ceed154d5fb3115;p=thirdparty%2Fkernel%2Fstable.git iio: adc: ti-ads131e08: Fix alignment for DMA safety [ Upstream commit 55afdd050c063ae4b8dbd566107a030c00d005fd ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: d935eddd2799 ("iio: adc: Add driver for Texas Instruments ADS131E0x ADC family") Signed-off-by: Jonathan Cameron Cc: Tomislav Denis Acked-by: Nuno Sá Link: https://lore.kernel.org/r/20220508175712.647246-36-jic23@kernel.org Signed-off-by: Sasha Levin --- diff --git a/drivers/iio/adc/ti-ads131e08.c b/drivers/iio/adc/ti-ads131e08.c index 80a09817c1194..32237cacc9a37 100644 --- a/drivers/iio/adc/ti-ads131e08.c +++ b/drivers/iio/adc/ti-ads131e08.c @@ -105,7 +105,7 @@ struct ads131e08_state { s64 ts __aligned(8); } tmp_buf; - u8 tx_buf[3] ____cacheline_aligned; + u8 tx_buf[3] __aligned(IIO_DMA_MINALIGN); /* * Add extra one padding byte to be able to access the last channel * value using u32 pointer