From: Thomas Richard Date: Fri, 17 Apr 2026 18:55:39 +0000 (+0200) Subject: kernel/stm32: restore files for v6.12 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cd0f38dfc2b879366a93cad4eb67bfdcde295a20;p=thirdparty%2Fopenwrt.git kernel/stm32: restore files for v6.12 This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Thomas Richard Link: https://github.com/openwrt/openwrt/pull/22989 Signed-off-by: Jonas Jelonek --- diff --git a/target/linux/stm32/patches-6.12/032-ARM-dts-stm32-rtc-add-pin-to-provide-LSCO-on-stm32mp.patch b/target/linux/stm32/patches-6.12/032-ARM-dts-stm32-rtc-add-pin-to-provide-LSCO-on-stm32mp.patch new file mode 100644 index 00000000000..5bc5371eacf --- /dev/null +++ b/target/linux/stm32/patches-6.12/032-ARM-dts-stm32-rtc-add-pin-to-provide-LSCO-on-stm32mp.patch @@ -0,0 +1,31 @@ +From 92483a156238078562d187f527de6b358cb53a08 Mon Sep 17 00:00:00 2001 +From: Valentin Caron +Date: Tue, 27 Aug 2024 16:04:48 +0200 +Subject: [PATCH] ARM: dts: stm32: rtc, add pin to provide LSCO on + stm32mp13 + +Declare pin for LSCO in stm32-pinctrl provider node to reserve this pin +for RTC OUT2_RMP, in stm32mp13-pinctrl.dtsi. + +Signed-off-by: Valentin Caron +Signed-off-by: Alexandre Torgue +--- + arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi ++++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +@@ -595,6 +595,13 @@ + }; + + /omit-if-no-ref/ ++ rtc_rsvd_pins_a: rtc-rsvd-0 { ++ pins { ++ pinmux = ; /* RTC_OUT2_RMP */ ++ }; ++ }; ++ ++ /omit-if-no-ref/ + sai1a_pins_a: sai1a-0 { + pins { + pinmux = , /* SAI1_SCK_A */ diff --git a/target/linux/stm32/patches-6.12/033-ARM-dts-stm32-rtc-add-LSCO-to-WLAN-BT-module-on-stm3.patch b/target/linux/stm32/patches-6.12/033-ARM-dts-stm32-rtc-add-LSCO-to-WLAN-BT-module-on-stm3.patch new file mode 100644 index 00000000000..d79c79883b1 --- /dev/null +++ b/target/linux/stm32/patches-6.12/033-ARM-dts-stm32-rtc-add-LSCO-to-WLAN-BT-module-on-stm3.patch @@ -0,0 +1,34 @@ +From d6e424f926397e682fc44a952d5b3a1e34b2cd73 Mon Sep 17 00:00:00 2001 +From: Valentin Caron +Date: Tue, 27 Aug 2024 16:04:50 +0200 +Subject: [PATCH] ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on + stm32mp135f-dk + +On stm32mp135f-dk board, WLAN/BT module LPO_IN pin is wired to +RTC OUT2_RMP pin. + +Provide a pinctrl configuration to enable LSCO on OUT2_RMP. + +Signed-off-by: Valentin Caron +Signed-off-by: Alexandre Torgue +--- + arch/arm/boot/dts/st/stm32mp135f-dk.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts ++++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts +@@ -346,7 +346,14 @@ + }; + + &rtc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtc_rsvd_pins_a>; + status = "okay"; ++ ++ rtc_lsco_pins_a: rtc-lsco-0 { ++ pins = "out2_rmp"; ++ function = "lsco"; ++ }; + }; + + &scmi_regu { diff --git a/target/linux/stm32/patches-6.12/034-ARM-dts-stm32-add-support-of-WLAN-BT-on-stm32mp135f-.patch b/target/linux/stm32/patches-6.12/034-ARM-dts-stm32-add-support-of-WLAN-BT-on-stm32mp135f-.patch new file mode 100644 index 00000000000..3fa16334188 --- /dev/null +++ b/target/linux/stm32/patches-6.12/034-ARM-dts-stm32-add-support-of-WLAN-BT-on-stm32mp135f-.patch @@ -0,0 +1,84 @@ +From 6b44fdef4c7ad112e17d7cbd64d7d522a426d6e4 Mon Sep 17 00:00:00 2001 +From: Christophe Roullier +Date: Tue, 27 Aug 2024 16:04:52 +0200 +Subject: [PATCH] ARM: dts: stm32: add support of WLAN/BT on stm32mp135f-dk + +Add support of WLAN/BT Murata Type 1DX module: +- usart2 is used for Bluetooth interface +- sdmmc2 is used for WLAN (sdio) interface + +Signed-off-by: Christophe Roullier +Signed-off-by: Valentin Caron +Signed-off-by: Alexandre Torgue +--- + arch/arm/boot/dts/st/stm32mp135f-dk.dts | 45 +++++++++++++++++++++++++ + 1 file changed, 45 insertions(+) + +--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts ++++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts +@@ -121,6 +121,19 @@ + }; + }; + }; ++ ++ v3v3_ao: v3v3-ao { ++ compatible = "regulator-fixed"; ++ regulator-name = "v3v3_ao"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ wifi_pwrseq: wifi-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&mcp23017 11 GPIO_ACTIVE_LOW>; ++ }; + }; + + &adc_1 { +@@ -392,6 +405,30 @@ + status = "okay"; + }; + ++/* Wifi */ ++&sdmmc2 { ++ pinctrl-names = "default", "opendrain", "sleep"; ++ pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_clk_pins_a>; ++ pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_clk_pins_a>; ++ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; ++ non-removable; ++ cap-sdio-irq; ++ st,neg-edge; ++ bus-width = <4>; ++ vmmc-supply = <&v3v3_ao>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ brcmf: bcrmf@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtc_lsco_pins_a>; ++ }; ++}; ++ + &spi5 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&spi5_pins_a>; +@@ -498,6 +535,14 @@ + pinctrl-2 = <&usart2_idle_pins_a>; + uart-has-rtscts; + status = "okay"; ++ ++ bluetooth { ++ shutdown-gpios = <&mcp23017 13 GPIO_ACTIVE_HIGH>; ++ compatible = "brcm,bcm43438-bt"; ++ max-speed = <3000000>; ++ vbat-supply = <&v3v3_ao>; ++ vddio-supply = <&v3v3_ao>; ++ }; + }; + + &usbh_ehci { diff --git a/target/linux/stm32/patches-6.12/035-ARM-dts-stm32-rtc-add-pin-to-provide-LSCO-on-stm32mp.patch b/target/linux/stm32/patches-6.12/035-ARM-dts-stm32-rtc-add-pin-to-provide-LSCO-on-stm32mp.patch new file mode 100644 index 00000000000..888dc1977e6 --- /dev/null +++ b/target/linux/stm32/patches-6.12/035-ARM-dts-stm32-rtc-add-pin-to-provide-LSCO-on-stm32mp.patch @@ -0,0 +1,30 @@ +From d6b0d7a941c4fc9241d9cca66db5d8ff9d81cc8b Mon Sep 17 00:00:00 2001 +From: Valentin Caron +Date: Tue, 27 Aug 2024 16:04:47 +0200 +Subject: [PATCH] ARM: dts: stm32: rtc, add pin to provide LSCO on stm32mp15 + +Declare pin for LSCO in stm32-pinctrl provider node to reserve this pin +for RTC OUT2_RMP, in stm32mp15-pinctrl.dtsi. + +Signed-off-by: Valentin Caron +Signed-off-by: Alexandre Torgue +--- + arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi ++++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +@@ -1697,6 +1697,13 @@ + }; + + /omit-if-no-ref/ ++ rtc_rsvd_pins_a: rtc-rsvd-0 { ++ pins { ++ pinmux = ; /* RTC_OUT2_RMP */ ++ }; ++ }; ++ ++ /omit-if-no-ref/ + sai2a_pins_a: sai2a-0 { + pins { + pinmux = , /* SAI2_SCK_A */ diff --git a/target/linux/stm32/patches-6.12/036-ARM-dts-stm32-rtc-add-LSCO-to-WLAN-BT-module-on-stm3.patch b/target/linux/stm32/patches-6.12/036-ARM-dts-stm32-rtc-add-LSCO-to-WLAN-BT-module-on-stm3.patch new file mode 100644 index 00000000000..338f61be0d6 --- /dev/null +++ b/target/linux/stm32/patches-6.12/036-ARM-dts-stm32-rtc-add-LSCO-to-WLAN-BT-module-on-stm3.patch @@ -0,0 +1,36 @@ +From c24e7ae60d3e97799998466a4220ef6ffa0e4c94 Mon Sep 17 00:00:00 2001 +From: Valentin Caron +Date: Tue, 27 Aug 2024 16:04:49 +0200 +Subject: [PATCH] ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on + stm32mp157c-dk2 + +On stm32mp157c-dk2 board, WLAN/BT module LPO_IN pin is wired to +RTC OUT2_RMP pin. + +Provide a pinctrl configuration to enable LSCO on OUT2_RMP. + +Signed-off-by: Valentin Caron +Signed-off-by: Alexandre Torgue +--- + arch/arm/boot/dts/st/stm32mp157c-dk2.dts | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts ++++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts +@@ -84,6 +84,16 @@ + }; + }; + ++&rtc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtc_rsvd_pins_a>; ++ ++ rtc_lsco_pins_a: rtc-lsco-0 { ++ pins = "out2_rmp"; ++ function = "lsco"; ++ }; ++}; ++ + &usart2 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart2_pins_c>; diff --git a/target/linux/stm32/patches-6.12/037-ARM-dts-stm32-add-support-of-WLAN-BT-on-stm32mp157c-.patch b/target/linux/stm32/patches-6.12/037-ARM-dts-stm32-add-support-of-WLAN-BT-on-stm32mp157c-.patch new file mode 100644 index 00000000000..50e2fbcae20 --- /dev/null +++ b/target/linux/stm32/patches-6.12/037-ARM-dts-stm32-add-support-of-WLAN-BT-on-stm32mp157c-.patch @@ -0,0 +1,76 @@ +From 315fe7667c03c1f853e1a7038c28f23621a44a3d Mon Sep 17 00:00:00 2001 +From: Christophe Roullier +Date: Tue, 27 Aug 2024 16:04:51 +0200 +Subject: [PATCH] ARM: dts: stm32: add support of WLAN/BT on stm32mp157c-dk2 + +Add support of WLAN/BT Murata Type 1DX module: +- usart2 is used for Bluetooth interface +- sdmmc2 is used for WLAN (sdio) interface + +Signed-off-by: Christophe Roullier +Signed-off-by: Valentin Caron +Signed-off-by: Alexandre Torgue +--- + arch/arm/boot/dts/st/stm32mp157c-dk2.dts | 41 +++++++++++++++++++++++- + 1 file changed, 40 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts ++++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts +@@ -24,6 +24,11 @@ + chosen { + stdout-path = "serial0:115200n8"; + }; ++ ++ wifi_pwrseq: wifi-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>; ++ }; + }; + + &cryp1 { +@@ -94,10 +99,44 @@ + }; + }; + ++/* Wifi */ ++&sdmmc2 { ++ pinctrl-names = "default", "opendrain", "sleep"; ++ pinctrl-0 = <&sdmmc2_b4_pins_a>; ++ pinctrl-1 = <&sdmmc2_b4_od_pins_a>; ++ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; ++ non-removable; ++ cap-sdio-irq; ++ st,neg-edge; ++ bus-width = <4>; ++ vmmc-supply = <&v3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ brcmf: bcrmf@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtc_lsco_pins_a>; ++ }; ++}; ++ ++/* Bluetooth */ + &usart2 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart2_pins_c>; + pinctrl-1 = <&usart2_sleep_pins_c>; + pinctrl-2 = <&usart2_idle_pins_c>; +- status = "disabled"; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; ++ compatible = "brcm,bcm43438-bt"; ++ max-speed = <3000000>; ++ vbat-supply = <&v3v3>; ++ vddio-supply = <&v3v3>; ++ }; + }; diff --git a/target/linux/stm32/patches-6.12/700-net-stmmac-dwmac-stm32-add-support-of-phy-supply-pro.patch b/target/linux/stm32/patches-6.12/700-net-stmmac-dwmac-stm32-add-support-of-phy-supply-pro.patch new file mode 100644 index 00000000000..fde697a263c --- /dev/null +++ b/target/linux/stm32/patches-6.12/700-net-stmmac-dwmac-stm32-add-support-of-phy-supply-pro.patch @@ -0,0 +1,106 @@ +From 7bfe3404a02923ca3858abf56b18a098b4be33b2 Mon Sep 17 00:00:00 2001 +From: Christophe Roullier +Date: Wed, 10 Nov 2021 17:39:40 +0100 +Subject: [PATCH] net: ethernet: stmmac: stm32: support the phy-supply + regulator binding + +Configure the phy regulator if defined by the "phy-supply" DT phandle. + +Signed-off-by: Christophe Roullier +--- + .../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 51 ++++++++++++++++++- + 1 file changed, 50 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -103,6 +104,7 @@ struct stm32_dwmac { + u32 mode_reg; /* MAC glue-logic mode register */ + u32 mode_mask; + struct regmap *regmap; ++ struct regulator *regulator; + u32 speed; + const struct stm32_ops *ops; + struct device *dev; +@@ -443,6 +445,16 @@ static int stm32_dwmac_parse_data(struct + } + } + ++ dwmac->regulator = devm_regulator_get_optional(dev, "phy"); ++ if (IS_ERR(dwmac->regulator)) { ++ if (PTR_ERR(dwmac->regulator) == -EPROBE_DEFER) { ++ dev_dbg(dev, "phy regulator is not available yet, deferred probing\n"); ++ return -EPROBE_DEFER; ++ } ++ dev_dbg(dev, "no regulator found\n"); ++ dwmac->regulator = NULL; ++ } ++ + return err; + } + +@@ -508,6 +520,28 @@ static int stm32mp1_parse_data(struct st + return err; + } + ++static int phy_power_on(struct stm32_dwmac *bsp_priv, bool enable) ++{ ++ int ret; ++ struct device *dev = bsp_priv->dev; ++ ++ if (!bsp_priv->regulator) ++ return 0; ++ ++ if (enable) { ++ ret = regulator_enable(bsp_priv->regulator); ++ if (ret) ++ dev_err(dev, "fail to enable phy-supply\n"); ++ } else { ++ ret = regulator_disable(bsp_priv->regulator); ++ if (ret) ++ dev_err(dev, "fail to disable phy-supply\n"); ++ } ++ ++ return 0; ++} ++ ++ + static int stm32_dwmac_probe(struct platform_device *pdev) + { + struct plat_stmmacenet_data *plat_dat; +@@ -549,12 +583,18 @@ static int stm32_dwmac_probe(struct plat + if (ret) + return ret; + +- ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); ++ ret = phy_power_on(plat_dat->bsp_priv, true); + if (ret) + goto err_clk_disable; + ++ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); ++ if (ret) ++ goto err_gmac_powerdown; ++ + return 0; + ++err_gmac_powerdown: ++ phy_power_on(plat_dat->bsp_priv, false); + err_clk_disable: + stm32_dwmac_clk_disable(dwmac, false); + +@@ -575,6 +615,8 @@ static void stm32_dwmac_remove(struct pl + dev_pm_clear_wake_irq(&pdev->dev); + device_init_wakeup(&pdev->dev, false); + } ++ ++ phy_power_on(priv->plat->bsp_priv, false); + } + + static int stm32mp1_suspend(struct stm32_dwmac *dwmac) diff --git a/target/linux/stm32/patches-6.12/900-ARM-dts-stm32-add-ethernet2-for-STM32MP135F-DK-board.patch b/target/linux/stm32/patches-6.12/900-ARM-dts-stm32-add-ethernet2-for-STM32MP135F-DK-board.patch new file mode 100644 index 00000000000..0005f48d743 --- /dev/null +++ b/target/linux/stm32/patches-6.12/900-ARM-dts-stm32-add-ethernet2-for-STM32MP135F-DK-board.patch @@ -0,0 +1,53 @@ +From 63c84f846ec5b794a6c90a1c5813cdb0ae75daf6 Mon Sep 17 00:00:00 2001 +From: Thomas Richard +Date: Thu, 26 Sep 2024 16:48:52 +0200 +Subject: [PATCH] ARM: dts: stm32: add ethernet2 for STM32MP135F-DK board + +This patch is based on the stm32mp135f-dk devicetree from 6.6 ST kernel. + +Signed-off-by: Thomas Richard +--- + arch/arm/boot/dts/st/stm32mp135f-dk.dts | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts ++++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts +@@ -20,6 +20,7 @@ + + aliases { + ethernet0 = ðernet1; ++ ethernet1 = ðernet2; + serial0 = &uart4; + serial1 = &usart1; + serial2 = &uart8; +@@ -208,6 +209,30 @@ + }; + }; + ++ðernet2 { ++ status = "okay"; ++ pinctrl-0 = <ð2_rmii_pins_a>; ++ pinctrl-1 = <ð2_rmii_sleep_pins_a>; ++ pinctrl-names = "default", "sleep"; ++ phy-mode = "rmii"; ++ phy-handle = <&phy0_eth2>; ++ st,ext-phyclk; ++ phy-supply = <&scmi_v3v3_sw>; ++ ++ mdio1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ phy0_eth2: ethernet-phy@0 { ++ compatible = "ethernet-phy-id0007.c131"; ++ reset-gpios = <&mcp23017 10 GPIO_ACTIVE_LOW>; ++ reg = <0>; ++ }; ++ }; ++}; ++ ++ ++ + &i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_a>; diff --git a/target/linux/stm32/patches-6.12/910-ARM-dts-stm32-add-missing-eth_wake_irq-interrupt-for.patch b/target/linux/stm32/patches-6.12/910-ARM-dts-stm32-add-missing-eth_wake_irq-interrupt-for.patch new file mode 100644 index 00000000000..2da0749b7d3 --- /dev/null +++ b/target/linux/stm32/patches-6.12/910-ARM-dts-stm32-add-missing-eth_wake_irq-interrupt-for.patch @@ -0,0 +1,26 @@ +From 6e10eb83e20e3a31bef8580bb4197240b0a28888 Mon Sep 17 00:00:00 2001 +From: Thomas Richard +Date: Thu, 17 Oct 2024 19:51:32 +0200 +Subject: [PATCH] ARM: dts: stm32: add missing eth_wake_irq interrupt for the + ethernet on STM32MP157 + +Signed-off-by: Thomas Richard +--- + arch/arm/boot/dts/st/stm32mp151.dtsi | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/st/stm32mp151.dtsi ++++ b/arch/arm/boot/dts/st/stm32mp151.dtsi +@@ -1721,8 +1721,10 @@ + compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; + reg = <0x5800a000 0x2000>; + reg-names = "stmmaceth"; +- interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; +- interrupt-names = "macirq"; ++ interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, ++ <&exti 70 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-names = "macirq", ++ "eth_wake_irq"; + clock-names = "stmmaceth", + "mac-clk-tx", + "mac-clk-rx", diff --git a/target/linux/stm32/stm32mp1/config-6.12 b/target/linux/stm32/stm32mp1/config-6.12 new file mode 100644 index 00000000000..4467ac879ae --- /dev/null +++ b/target/linux/stm32/stm32mp1/config-6.12 @@ -0,0 +1,496 @@ +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_FORCE_MAX_ORDER=12 +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_STM32=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_ERRATA_430973=y +CONFIG_ARM_ERRATA_643719=y +CONFIG_ARM_ERRATA_720789=y +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_754327=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_ARM_ERRATA_798181=y +CONFIG_ARM_ERRATA_814220=y +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_GROUP_RELOCS=y +# CONFIG_ARM_HIGHBANK_CPUIDLE is not set +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_PAN=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_ARM_PSCI=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +CONFIG_ARM_PSCI_FW=y +CONFIG_ARM_SCMI_CPUFREQ=y +# CONFIG_ARM_SCMI_DEBUG_COUNTERS is not set +CONFIG_ARM_SCMI_HAVE_MSG=y +CONFIG_ARM_SCMI_HAVE_SHMEM=y +CONFIG_ARM_SCMI_HAVE_TRANSPORT=y +CONFIG_ARM_SCMI_PERF_DOMAIN=y +# CONFIG_ARM_SCMI_POWER_CONTROL is not set +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCMI_PROTOCOL=y +# CONFIG_ARM_SCMI_RAW_MODE_SUPPORT is not set +CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y +CONFIG_ARM_SCMI_TRANSPORT_SMC=y +# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set +CONFIG_ARM_SMCCC_SOC_ID=y +CONFIG_ARM_SMC_WATCHDOG=y +# CONFIG_ARM_SMMU is not set +CONFIG_ARM_THUMB=y +CONFIG_ARM_THUMBEE=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_PM=y +CONFIG_BOUNCE=y +CONFIG_BUFFER_HEAD=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y +CONFIG_CHR_DEV_SG=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLKSRC_STM32=y +CONFIG_CLK_ICST=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMA=y +CONFIG_CMA_ALIGNMENT=8 +CONFIG_CMA_AREAS=7 +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_SIZE_MBYTES=64 +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SYSFS is not set +CONFIG_CMDLINE_PARTITION=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_SCMI=y +CONFIG_COMMON_CLK_STM32MP=y +CONFIG_COMMON_CLK_STM32MP135=y +CONFIG_COMMON_CLK_STM32MP157=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CONTIG_ALLOC=y +CONFIG_COREDUMP=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +CONFIG_CPU_ISOLATION=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CURRENT_POINTER_IN_TPIDRURO=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_ALIGN_RODATA=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DEVFREQ_GOV_PASSIVE=y +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +CONFIG_DMADEVICES=y +CONFIG_DMA_CMA=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS_HELPERS=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DNOTIFY=y +CONFIG_DTC=y +CONFIG_DT_IDLE_GENPD=y +CONFIG_DT_IDLE_STATES=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DWMAC_DWC_QOS_ETH=y +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_STM32=y +CONFIG_DW_DMAC=y +CONFIG_DW_DMAC_CORE=y +CONFIG_EDAC=y +CONFIG_EDAC_ATOMIC_SCRUB=y +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_LEGACY_SYSFS=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ELF_CORE=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_EXT4_FS=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FREEZER=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CACHE=y +# CONFIG_FW_LOADER_USER_HELPER is not set +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_DEVICES=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_SYSCON=y +# CONFIG_GPIO_SYSFS is not set +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_HOTPLUG_CORE_SYNC=y +CONFIG_HOTPLUG_CORE_SYNC_DEAD=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OPTEE=y +CONFIG_HW_RANDOM_STM32=y +CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_DEMUX_PINCTRL=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_GPIO=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_MUX_PINCTRL=y +CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_TESTUNIT is not set +CONFIG_I2C_SMBUS=y +# CONFIG_I2C_STM32F4 is not set +CONFIG_I2C_STM32F7=y +CONFIG_INPUT=y +# CONFIG_INPUT_STPMIC1_ONKEY is not set +# CONFIG_IOMMUFD is not set +# CONFIG_IOMMU_DEBUGFS is not set +CONFIG_IOMMU_IO_PGTABLE=y +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +CONFIG_IOMMU_SUPPORT=y +CONFIG_IRQCHIP=y +CONFIG_IRQSTACKS=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_XZ is not set +CONFIG_KMAP_LOCAL=y +CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_TRANSIENT=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LOG_BUF_SHIFT=16 +# CONFIG_LRU_GEN is not set +CONFIG_LZO_DECOMPRESS=y +CONFIG_MACH_STM32MP13=y +CONFIG_MACH_STM32MP157=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_GPIO is not set +CONFIG_MEMORY=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_STM32_LPTIMER is not set +# CONFIG_MFD_STM32_TIMERS is not set +CONFIG_MFD_STPMIC1=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_STM32_SDMMC=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y +CONFIG_NEON=y +CONFIG_NET_DEVMEM=y +CONFIG_NET_EGRESS=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_XGRESS=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=2 +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_RESOLVE=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OPTEE=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PAGE_POOL_STATS=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_PCS_XPCS=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PER_VMA_LOCK=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +CONFIG_PHYLINK=y +# CONFIG_PHY_STM32_USBPHYC is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MCP23S08=y +CONFIG_PINCTRL_MCP23S08_I2C=y +# CONFIG_PINCTRL_SCMI is not set +CONFIG_PINCTRL_STM32=y +CONFIG_PINCTRL_STM32MP135=y +CONFIG_PINCTRL_STM32MP157=y +# CONFIG_PL353_SMC is not set +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_DEVFREQ=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_OPP=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_POWER_SUPPLY=y +CONFIG_PPS=y +CONFIG_PRINTK_TIME=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +# CONFIG_RAVE_SP_CORE is not set +CONFIG_REALTEK_PHY=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_ARM_SCMI=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_STM32_BOOSTER is not set +CONFIG_REGULATOR_STM32_PWR=y +# CONFIG_REGULATOR_STM32_VREFBUF is not set +CONFIG_REGULATOR_STPMIC1=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SCMI=y +CONFIG_RESET_SIMPLE=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_OPTEE is not set +CONFIG_RTC_DRV_STM32=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SCSI=y +CONFIG_SCSI_COMMON=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_STM32=y +CONFIG_SERIAL_STM32_CONSOLE=y +CONFIG_SERIO=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_SERPORT=y +CONFIG_SGL_ALLOC=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SMSC_PHY=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BUS=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SPARSE_IRQ=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_STM32MP_EXTI=y +CONFIG_STM32_DMA=y +# CONFIG_STM32_DMA3 is not set +CONFIG_STM32_DMAMUX=y +CONFIG_STM32_FIREWALL=y +# CONFIG_STM32_FMC2_EBI is not set +CONFIG_STM32_MDMA=y +CONFIG_STM32_WATCHDOG=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_STPMIC1_WATCHDOG is not set +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TEE=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_TRUSTED_FOUNDATIONS=y +# CONFIG_UCLAMP_TASK is not set +# CONFIG_UEVENT_HELPER is not set +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB_SUPPORT=y +CONFIG_USELIB=y +CONFIG_USE_OF=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_VMAP_STACK=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_XPS=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y