From: Takayuki 'January June' Suwa Date: Tue, 4 Jul 2023 00:57:03 +0000 (+0900) Subject: xtensa: Use HARD_REG_SET instead of bare integer X-Git-Tag: basepoints/gcc-15~7842 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cd22b97726472138d3fe22fb1ff0c27176408fc9;p=thirdparty%2Fgcc.git xtensa: Use HARD_REG_SET instead of bare integer gcc/ChangeLog: * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue): Change to use HARD_REG_BIT and its macros. * config/xtensa/xtensa.md (peephole2: regmove elimination during DFmode input reload): Likewise. --- diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index 3298d53493c0..992e80d824db 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -107,7 +107,7 @@ struct GTY(()) machine_function bool epilogue_done; bool inhibit_logues_a1_adjusts; rtx last_logues_a9_content; - HOST_WIDE_INT eliminated_callee_saved_bmp; + HARD_REG_SET eliminated_callee_saved; }; static void xtensa_option_override (void); @@ -3586,7 +3586,8 @@ xtensa_expand_prologue (void) df_insn_rescan (insnS); SET_SRC (PATTERN (insnR)) = copy_rtx (mem); df_insn_rescan (insnR); - cfun->machine->eliminated_callee_saved_bmp |= 1 << regno; + SET_HARD_REG_BIT (cfun->machine->eliminated_callee_saved, + regno); } else { @@ -3690,8 +3691,8 @@ xtensa_expand_epilogue (bool sibcall_p) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; ++regno) if (xtensa_call_save_reg(regno)) { - if (! (cfun->machine->eliminated_callee_saved_bmp - & (1 << regno))) + if (! TEST_HARD_REG_BIT (cfun->machine->eliminated_callee_saved, + regno)) { rtx x = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset)); diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 664424f12392..5386e45b51da 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -3240,15 +3240,14 @@ (set (match_dup 3) (match_dup 7))] { - uint32_t check = 0; + HARD_REG_SET regs; int i; + CLEAR_HARD_REG_SET (regs); for (i = 0; i <= 3; ++i) - { - uint32_t mask = (uint32_t)1 << REGNO (operands[i]); - if (check & mask) - FAIL; - check |= mask; - } + if (TEST_HARD_REG_BIT (regs, REGNO (operands[i]))) + FAIL; + else + SET_HARD_REG_BIT (regs, REGNO (operands[i])); operands[6] = gen_rtx_MEM (SFmode, XEXP (operands[6], 0)); operands[7] = gen_rtx_MEM (SFmode, XEXP (operands[7], 0)); })