From: Pan Li <pan2.li@intel.com>
Date: Tue, 12 Mar 2024 07:01:57 +0000 (+0800)
Subject: RISC-V: Fix some code style issue(s) in riscv-c.cc [NFC]
X-Git-Tag: basepoints/gcc-15~703
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cdf0c6604d03afd7f544dd8bd5d43d9ded059ada;p=thirdparty%2Fgcc.git

RISC-V: Fix some code style issue(s) in riscv-c.cc [NFC]

Notice some code style issue(s) when add __riscv_v_fixed_vlen, includes:

* Meanless empty line.
* Line greater than 80 chars.
* Indent with 3 space(s).
* Argument unalignment.

gcc/ChangeLog:

	* config/riscv/riscv-c.cc (riscv_ext_version_value): Fix
	code style greater than 80 chars.
	(riscv_cpu_cpp_builtins): Fix useless empty line, indent
	with 3 space(s) and argument unalignment.

Signed-off-by: Pan Li <pan2.li@intel.com>
---

diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
index 3755ec0b8ef3..7029ba881869 100644
--- a/gcc/config/riscv/riscv-c.cc
+++ b/gcc/config/riscv/riscv-c.cc
@@ -37,7 +37,8 @@ along with GCC; see the file COPYING3.  If not see
 static int
 riscv_ext_version_value (unsigned major, unsigned minor)
 {
-  return (major * RISCV_MAJOR_VERSION_BASE) + (minor * RISCV_MINOR_VERSION_BASE);
+  return (major * RISCV_MAJOR_VERSION_BASE)
+    + (minor * RISCV_MINOR_VERSION_BASE);
 }
 
 /* Implement TARGET_CPU_CPP_BUILTINS.  */
@@ -110,7 +111,6 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile)
     case CM_MEDANY:
       builtin_define ("__riscv_cmodel_medany");
       break;
-
     }
 
   if (riscv_user_wants_strict_align)
@@ -142,9 +142,9 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile)
 				     riscv_ext_version_value (0, 12));
     }
 
-   if (TARGET_XTHEADVECTOR)
-     builtin_define_with_int_value ("__riscv_th_v_intrinsic",
-				     riscv_ext_version_value (0, 11));
+  if (TARGET_XTHEADVECTOR)
+    builtin_define_with_int_value ("__riscv_th_v_intrinsic",
+				   riscv_ext_version_value (0, 11));
 
   /* Define architecture extension test macros.  */
   builtin_define_with_int_value ("__riscv_arch_test", 1);