From: Peter Yin Date: Wed, 11 Jun 2025 08:05:13 +0000 (+0800) Subject: ARM: dts: aspeed: Harma: revise gpio bride pin for battery X-Git-Tag: v6.17-rc1~172^2~30^2~6 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ce5b2797b4fada53f669a6d474b2cbceb5c883a1;p=thirdparty%2Fkernel%2Flinux.git ARM: dts: aspeed: Harma: revise gpio bride pin for battery Update the GPIO bridge pin configuration for the battery circuit on the Harma platform to reflect the correct hardware design. Signed-off-by: Peter Yin Link: https://patch.msgid.link/20250611080514.3123335-5-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery --- diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts index 25b873ace2eac..fb026c8fb0ee5 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts @@ -643,7 +643,7 @@ /*T0-T7*/ "","","","","","","","", /*U0-U7*/ "","","","","","","led-identify-gate","", /*V0-V7*/ "","","","", - "rtc-battery-voltage-read-enable","", + "","", "","", /*W0-W7*/ "","","","","","","","", /*X0-X7*/ "","","","","","","","", @@ -728,7 +728,7 @@ "presence-cmm","ac-control-n", /*G0-G3 line 96-103*/ "FM_CPU_CORETYPE2","", - "FM_CPU_CORETYPE1","", + "FM_CPU_CORETYPE1","rtc-battery-voltage-read-enable", "FM_CPU_CORETYPE0","", "FM_BOARD_REV_ID5","", /*G4-G7 line 104-111*/