From: Julian Seward <jseward@acm.org>
Date: Thu, 16 Feb 2012 22:02:14 +0000 (+0000)
Subject: Implement PHMINPOSUW (SSE 4.1).  Fixes #287301.
X-Git-Tag: svn/VALGRIND_3_8_1^2~203
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cea40cfba4fd519252be70d538a8f5985dc28ca6;p=thirdparty%2Fvalgrind.git

Implement PHMINPOSUW (SSE 4.1).  Fixes #287301.
(Laurent Birtz, seerdecker@yahoo.com.au)


git-svn-id: svn://svn.valgrind.org/vex/trunk@2256
---

diff --git a/VEX/priv/guest_amd64_defs.h b/VEX/priv/guest_amd64_defs.h
index 94d55de7c0..30ffd6b910 100644
--- a/VEX/priv/guest_amd64_defs.h
+++ b/VEX/priv/guest_amd64_defs.h
@@ -141,6 +141,8 @@ extern ULong amd64g_calculate_mmx_psadbw   ( ULong, ULong );
 extern ULong amd64g_calculate_mmx_pmovmskb ( ULong );
 extern ULong amd64g_calculate_sse_pmovmskb ( ULong w64hi, ULong w64lo );
 
+extern ULong amd64g_calculate_sse_phminposuw ( ULong sLo, ULong sHi );
+
 extern ULong amd64g_calc_crc32b ( ULong crcIn, ULong b );
 extern ULong amd64g_calc_crc32w ( ULong crcIn, ULong w );
 extern ULong amd64g_calc_crc32l ( ULong crcIn, ULong l );
diff --git a/VEX/priv/guest_amd64_helpers.c b/VEX/priv/guest_amd64_helpers.c
index 86fa6b2412..8eb496134d 100644
--- a/VEX/priv/guest_amd64_helpers.c
+++ b/VEX/priv/guest_amd64_helpers.c
@@ -2840,6 +2840,22 @@ ULong amd64g_calculate_sse_pmovmskb ( ULong w64hi, ULong w64lo )
    return ((rHi8 & 0xFF) << 8) | (rLo8 & 0xFF);
 }
 
+/* CALLED FROM GENERATED CODE: CLEAN HELPER */
+ULong amd64g_calculate_sse_phminposuw ( ULong sLo, ULong sHi )
+{
+   UShort t, min;
+   UInt   idx;
+   t = sel16x4_0(sLo); if (True)    { min = t; idx = 0; }
+   t = sel16x4_1(sLo); if (t < min) { min = t; idx = 1; }
+   t = sel16x4_2(sLo); if (t < min) { min = t; idx = 2; }
+   t = sel16x4_3(sLo); if (t < min) { min = t; idx = 3; }
+   t = sel16x4_0(sHi); if (t < min) { min = t; idx = 4; }
+   t = sel16x4_1(sHi); if (t < min) { min = t; idx = 5; }
+   t = sel16x4_2(sHi); if (t < min) { min = t; idx = 6; }
+   t = sel16x4_3(sHi); if (t < min) { min = t; idx = 7; }
+   return ((ULong)(idx << 16)) | ((ULong)min);
+}
+
 /* CALLED FROM GENERATED CODE: CLEAN HELPER */
 ULong amd64g_calc_crc32b ( ULong crcIn, ULong b )
 {
diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
index a8ba1d4e58..af452ebe9d 100644
--- a/VEX/priv/guest_amd64_toIR.c
+++ b/VEX/priv/guest_amd64_toIR.c
@@ -15017,6 +15017,42 @@ Long dis_ESC_0F38__SSE4 ( Bool* decode_OK,
       }
       break;
 
+   case 0x41:
+      /* 66 0F 38 41 /r = PHMINPOSUW xmm1, xmm2/m128
+         Packed Horizontal Word Minimum from xmm2/m128 to xmm1 */
+      if (have66noF2noF3(pfx) && sz == 2) {
+         IRTemp sV  = newTemp(Ity_V128);
+         IRTemp sHi = newTemp(Ity_I64);
+         IRTemp sLo = newTemp(Ity_I64);
+         IRTemp dLo = newTemp(Ity_I64);
+         modrm = getUChar(delta);
+         if (epartIsReg(modrm)) {
+            assign( sV, getXMMReg(eregOfRexRM(pfx,modrm)) );
+            delta += 1;
+            DIP("phminposuw %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
+                                      nameXMMReg(gregOfRexRM(pfx,modrm)));
+         } else {
+            addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+            gen_SEGV_if_not_16_aligned(addr);
+            assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
+            delta += alen;
+            DIP("phminposuw %s,%s\n", dis_buf,
+                                      nameXMMReg(gregOfRexRM(pfx,modrm)));
+         }
+         assign( sHi, unop(Iop_V128HIto64, mkexpr(sV)) );
+         assign( sLo, unop(Iop_V128to64,   mkexpr(sV)) );
+         assign( dLo, mkIRExprCCall(
+                         Ity_I64, 0/*regparms*/,
+                         "amd64g_calculate_sse_phminposuw", 
+                         &amd64g_calculate_sse_phminposuw,
+                         mkIRExprVec_2( mkexpr(sLo), mkexpr(sHi) )
+                      ));
+         putXMMReg(gregOfRexRM(pfx,modrm), unop(Iop_64UtoV128, mkexpr(dLo)));
+
+         goto decode_success;
+      } 
+      break;
+
    case 0xDC:
    case 0xDD:
    case 0xDE: