From: Alex Bennée Date: Wed, 21 Jan 2026 10:59:32 +0000 (+0000) Subject: hw/intc: avoid byte swap fiddling in gicv3 its path X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cf10273aff8198ab1c7e2a00e7e5fe51c80b04e7;p=thirdparty%2Fqemu.git hw/intc: avoid byte swap fiddling in gicv3 its path This allows us to keep the MSI data in plain host order all the way from the MemoryRegionOps write method to the final KVM_SIGNAL_MSI ioctl. This fixes a theoretical bug on big-endian hosts because we were using different size byte swaps which would have truncated the data. Signed-off-by: Alex Bennée Reviewed-by: Peter Maydell Message-id: 20260121105932.135676-5-alex.bennee@linaro.org Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell --- diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c index 9fc51ad1e0..60a5abd8d3 100644 --- a/hw/intc/arm_gicv3_its_common.c +++ b/hw/intc/arm_gicv3_its_common.c @@ -81,7 +81,7 @@ static MemTxResult gicv3_its_trans_write(void *opaque, hwaddr offset, if (offset == 0x0040 && ((size == 2) || (size == 4))) { GICv3ITSState *s = ARM_GICV3_ITS_COMMON(opaque); GICv3ITSCommonClass *c = ARM_GICV3_ITS_COMMON_GET_CLASS(s); - int ret = c->send_msi(s, le64_to_cpu(value), attrs.requester_id); + int ret = c->send_msi(s, value, attrs.requester_id); if (ret <= 0) { qemu_log_mask(LOG_GUEST_ERROR, diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index ae12d41eee..a8d6d4fb54 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -58,7 +58,7 @@ static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid) msi.address_lo = extract64(s->gits_translater_gpa, 0, 32); msi.address_hi = extract64(s->gits_translater_gpa, 32, 32); - msi.data = le32_to_cpu(value); + msi.data = value; msi.flags = KVM_MSI_VALID_DEVID; msi.devid = devid; memset(msi.pad, 0, sizeof(msi.pad));