From: Tom Rini Date: Tue, 9 Jun 2026 16:26:36 +0000 (-0600) Subject: Merge patch series "ti: j7: Update to v0.12.0 of DDR config tool" X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=cf81e36fa0c85117dbfc9a8b606671eb4b25b9db;p=thirdparty%2Fu-boot.git Merge patch series "ti: j7: Update to v0.12.0 of DDR config tool" Neha Malcom Francis says: Update all DDR configuration DTSIs to the latest auto-generated output of the Sysconfig Tool (DDR Configuration for TDA4x, DRA8x, AM67x, AM68x, AM69x (0.12.00.0000)) [0] The auto-generated files must not be modified, but effort will be taken to change the tool output to adhere to the latest checkpatch.pl rules. J722S and J721E will also be updated in a subsequent series. All the changes have been kernel boot tested and memtester has passed (same as v1, as no functional changes made). [0] https://dev.ti.com/sysconfig/#/start Link: https://lore.kernel.org/r/20251103071035.674604-1-n-francis@ti.com --- cf81e36fa0c85117dbfc9a8b606671eb4b25b9db diff --cc arch/arm/dts/k3-j7200-r5-common-proc-board.dts index b0e73fe72c4,3127ac83d7f..8de96ad5c9e --- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts @@@ -6,10 -6,85 +6,10 @@@ /dts-v1/; #include "k3-j7200-common-proc-board.dts" - #include "k3-j7200-ddr-evm-lp4-2666.dtsi" + #include "k3-j7200-ddr-evm-lp4-3200.dtsi" #include "k3-j721e-ddr.dtsi" #include "k3-j7200-common-proc-board-u-boot.dtsi" - -/ { - aliases { - remoteproc0 = &sysctrler; - remoteproc1 = &a72_0; - }; - - a72_0: a72@0 { - compatible = "ti,am654-rproc"; - reg = <0x0 0x00a90000 0x0 0x10>; - power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, - <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>, - <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>; - resets = <&k3_reset 202 0>; - clocks = <&k3_clks 61 1>, <&k3_clks 202 2>, <&k3_clks 4 1> ; - clock-names = "gtc", "core", "msmc"; - assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 4 1>, - <&k3_clks 323 0>; - assigned-clock-parents= <0>, <0>, <0>, <&k3_clks 323 2>; - assigned-clock-rates = <2000000000>, <200000000>, <1000000000>; - ti,sci = <&dmsc>; - ti,sci-proc-id = <32>; - ti,sci-host-id = <10>; - bootph-pre-ram; - }; - - dm_tifs: dm-tifs { - compatible = "ti,j721e-dm-sci"; - ti,host-id = <3>; - ti,secure-host; - mbox-names = "rx", "tx"; - mboxes = <&secure_proxy_mcu 21>, - <&secure_proxy_mcu 23>; - bootph-pre-ram; - }; -}; - -&memorycontroller { - power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>, - <&k3_pds 90 TI_SCI_PD_SHARED>; - clocks = <&k3_clks 8 5>, <&k3_clks 30 9>; - bootph-pre-ram; -}; - -&mcu_timer0 { - /delete-property/ clocks; - /delete-property/ clocks-names; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - clock-frequency = <250000000>; - bootph-pre-ram; -}; - -&secure_proxy_mcu { - bootph-pre-ram; - status = "okay"; -}; - -&cbass_mcu_wakeup { - sysctrler: sysctrler { - compatible = "ti,am654-tisci-rproc-r5"; - mboxes= <&secure_proxy_mcu 4>, - <&secure_proxy_mcu 5>; - mbox-names = "tx", "rx"; - bootph-pre-ram; - }; -}; - -&dmsc { - mboxes = <&secure_proxy_mcu 8>, - <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>; - mbox-names = "tx", "rx", "notify"; - ti,host-id = <4>; - ti,secure-host; - bootph-pre-ram; -}; +#include "k3-j7200-r5.dtsi" &wkup_vtm0 { bootph-pre-ram;