From: Kito Cheng <kito.cheng@sifive.com>
Date: Mon, 15 Jun 2020 03:51:13 +0000 (+0800)
Subject: RISC-V: Suppress warning for signed and unsigned integer comparison.
X-Git-Tag: releases/gcc-10.2.0~70
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d009e1d33a737d86681ec611cc2097f36a01b8eb;p=thirdparty%2Fgcc.git

RISC-V: Suppress warning for signed and unsigned integer comparison.

gcc/ChangeLog:

	* config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
	unsigned for i.
	(riscv_gpr_save_operation_p): Change type to unsigned for i and
	len.

(cherry picked from commit 82a3008e56c620008b4575a97e459e2769df54db)
---

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 41484056d4c3..4083c64fd595 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -5097,7 +5097,7 @@ riscv_gen_gpr_save_insn (struct riscv_frame_info *frame)
     gen_rtx_UNSPEC_VOLATILE (VOIDmode,
       gen_rtvec (1, GEN_INT (count)), UNSPECV_GPR_SAVE);
 
-  for (int i = 1; i < veclen; ++i)
+  for (unsigned i = 1; i < veclen; ++i)
     {
       unsigned regno = gpr_save_reg_order[i];
       rtx reg = gen_rtx_REG (Pmode, regno);
@@ -5125,9 +5125,9 @@ riscv_gen_gpr_save_insn (struct riscv_frame_info *frame)
 bool
 riscv_gpr_save_operation_p (rtx op)
 {
-  HOST_WIDE_INT len = XVECLEN (op, 0);
+  unsigned len = XVECLEN (op, 0);
   gcc_assert (len <= ARRAY_SIZE (gpr_save_reg_order));
-  for (int i = 0; i < len; i++)
+  for (unsigned i = 0; i < len; i++)
     {
       rtx elt = XVECEXP (op, 0, i);
       if (i == 0)