From: Alistair Francis Date: Wed, 14 Sep 2022 10:11:07 +0000 (+0200) Subject: hw/riscv: opentitan: Fixup resetvec X-Git-Tag: v7.2.0-rc0~76^2~13 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d057aaece7665d49e81ef8d8204b095351253f21;p=thirdparty%2Fqemu.git hw/riscv: opentitan: Fixup resetvec The resetvec for the OpenTitan machine ended up being set to an out of date value, so let's fix that and bump it to the correct start address (after the boot ROM) Fixes: bf8803c64d75 "hw/riscv: opentitan: bump opentitan version" Signed-off-by: Alistair Francis Message-Id: <20220914101108.82571-3-alistair.francis@wdc.com> Signed-off-by: Alistair Francis --- diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index af13dbe3b18..45c92c9bbc4 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -142,7 +142,7 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) &error_abort); object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, &error_abort); - object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x20000490, + object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x20000400, &error_abort); sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal);