From: Richard Henderson Date: Mon, 2 Feb 2026 04:04:44 +0000 (+1100) Subject: Merge tag 'pull-target-arm-20260129' of https://gitlab.com/pm215/qemu into staging X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d21a442a5ab9bc1597afea13f01113d5bb3e772c;p=thirdparty%2Fqemu.git Merge tag 'pull-target-arm-20260129' of https://gitlab.com/pm215/qemu into staging target-arm queue: * Support SMMUv3 acceleration * A few other minor cleanups and fixes # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAml7hesZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mFyEACUDY0XTLaqkCLQyeJc1OAg # +oH6sRblPCJpBT3Y8eFUiDjH/2amSdxADxNmE7B/+ltD2InXJ6lHfPsA+F7QiaXD # 7D0vKQ9LlQiv2KXwH75xEqTkG1W0m/9OLhnuyygiBIA+hjvCU5wuCmJ3AIAZOdV1 # haiW5Dg4++nxjyFNJOdC7IVCb8xIMO7rlITG4aAFhl8VOT9Orx/kJYvBCnk2flFP # +X8JQuI3kn5ew4iTahsvAnsxTSn403u/A7j1PT8I4cODnRoV7rNF4L+LmtROHkIs # Fkqz5LI7yN8IQeh8/kDxXr25tZnwsQ2xrBLcZsyMelVDN4fXj2+HDn+ohCNV+xIh # 65mlQkPZ+uos4PBLgXRmuRHfvt4EBYBwAx/iRk4D+NPmHbNGlznKBRiy/7/HpFsr # JH3XYJBW6iqmqbvfCfGJ83aiSfTkRYE/k/w8JPBO9ko8nmuqMwlCysHfBfmr/zU3 # 2MHzx+CcQ6kWEh7bi3R1r/r0LPtzT9Y4xsZKKhGyjKmwmA7eNbVCbpzbTmxWICcP # donH/9ecAX+il7/hZOZliG7050HeSPuZC+pM7BkJlLuiKDpfwn/hBeIPJu4JGna7 # N4qRls6rO3IOchzQk9eFewie1575xUV/BDUlNsXE2ZdN0n8XgSHd9lBXzlLeOoV+ # cjg2O1Iwi+53Nb4G5Ap74Q== # =JEwH # -----END PGP SIGNATURE----- # gpg: Signature made Fri 30 Jan 2026 03:08:11 AM AEDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell " [unknown] # gpg: aka "Peter Maydell " [unknown] # gpg: aka "Peter Maydell " [unknown] # gpg: aka "Peter Maydell " [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20260129' of https://gitlab.com/pm215/qemu: (43 commits) arm: add DCZID_EL0 to idregs array arm: add {get,set}_dczid_bs helpers docs/system: update FEAT_BBML[12] references MAINTAINERS: add emulation.rst to ARM TCG CPUs target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0 target/arm/hvf: Move hvf_sysreg_[read, write]_cp() functions around hw/arm/smmuv3-accel: Make SubstreamID support configurable hw/vfio/pci: Synthesize PASID capability for vfio-pci devices hw/pci: Factor out common PASID capability initialization hw/pci: Add helper to insert PCIe extended capability at a fixed offset backends/iommufd: Add get_pasid_info() callback backends/iommufd: Retrieve PASID width from iommufd_backend_get_device_info() hw/arm/smmuv3-accel: Add property to specify OAS bits hw/arm/smmuv3-accel: Add support for ATS hw/arm/smmuv3-accel: Add a property to specify RIL support hw/arm/smmuv3: Add accel property for SMMUv3 device hw/arm/smmuv3: Block migration when accel is enabled tests/qtest/bios-tables-test: Update IORT blobs after revision upgrade hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI nested binding tests/qtest/bios-tables-test: Prepare for IORT revison upgrade ... Signed-off-by: Richard Henderson --- d21a442a5ab9bc1597afea13f01113d5bb3e772c