From: Dmitry Baryshkov Date: Wed, 20 May 2026 14:51:19 +0000 (+0300) Subject: drm/msm/adreno: use new helper to set ubwc_swizzle X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d2fb2372768a54abb63bf5a61efb5a6a03a15ad5;p=thirdparty%2Fkernel%2Flinux.git drm/msm/adreno: use new helper to set ubwc_swizzle Use freshly defined helper instead of using the raw value from the database. Reviewed-by: Konrad Dybcio Reviewed-by: Akhil P Oommen Signed-off-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/726498/ Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-12-72f2749bc807@oss.qualcomm.com --- diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 43818d1907ab6..e7a0d315e0221 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -745,7 +745,7 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) BUG_ON(cfg->highest_bank_bit < 13); u32 hbb = cfg->highest_bank_bit - 13; bool rgb565_predicator = cfg->ubwc_enc_version >= UBWC_4_0; - u32 level2_swizzling_dis = !(cfg->ubwc_swizzle & UBWC_SWIZZLE_ENABLE_LVL2); + u32 level2_swizzling_dis = !(qcom_ubwc_swizzle(cfg) & UBWC_SWIZZLE_ENABLE_LVL2); bool ubwc_mode = qcom_ubwc_get_ubwc_mode(cfg); bool amsbc = cfg->ubwc_enc_version >= UBWC_3_0; bool min_acc_len_64b; diff --git a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c index 1923f904d37dc..53def136e0fc5 100644 --- a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c @@ -275,8 +275,8 @@ static void a8xx_set_ubwc_config(struct msm_gpu *gpu) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); const struct qcom_ubwc_cfg_data *cfg = adreno_gpu->ubwc_config; - u32 level2_swizzling_dis = !(cfg->ubwc_swizzle & UBWC_SWIZZLE_ENABLE_LVL2); - u32 level3_swizzling_dis = !(cfg->ubwc_swizzle & UBWC_SWIZZLE_ENABLE_LVL3); + u32 level2_swizzling_dis = !(qcom_ubwc_swizzle(cfg) & UBWC_SWIZZLE_ENABLE_LVL2); + u32 level3_swizzling_dis = !(qcom_ubwc_swizzle(cfg) & UBWC_SWIZZLE_ENABLE_LVL3); bool rgba8888_lossless = false, fp16compoptdis = false; bool yuvnotcomptofc = false, min_acc_len_64b = false; bool rgb565_predicator = false, amsbc = false; diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 78d7ac3fd8c74..6a0877e5374c7 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -434,7 +434,7 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx, case MSM_PARAM_UBWC_SWIZZLE: if (!adreno_gpu->ubwc_config) return UERR(ENOENT, drm, "no UBWC on this platform"); - *value = adreno_gpu->ubwc_config->ubwc_swizzle; + *value = qcom_ubwc_swizzle(adreno_gpu->ubwc_config); return 0; case MSM_PARAM_MACROTILE_MODE: if (!adreno_gpu->ubwc_config)