From: Jonas Jelonek <jelonek.jonas@gmail.com>
Date: Sun, 3 May 2026 22:17:30 +0000 (+0000)
Subject: realtek: add PoE support for XGS1930-28HP
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d3e2f2df8380640fba21ceb46741be49ed4165c7;p=thirdparty%2Fopenwrt.git

realtek: add PoE support for XGS1930-28HP

Add support for PoE on Zyxel XGS1930-28HP by leveraging the new Realtek
PSE driver. Define the PSE controller with all its properties in DTS of
the device and link it to the PHYs.

Link: https://github.com/openwrt/openwrt/pull/24239
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
---

diff --git a/target/linux/realtek/dts/rtl9301_zyxel_xgs1930-28hp.dts b/target/linux/realtek/dts/rtl9301_zyxel_xgs1930-28hp.dts
index 7c015900537..78c0c19ae4c 100644
--- a/target/linux/realtek/dts/rtl9301_zyxel_xgs1930-28hp.dts
+++ b/target/linux/realtek/dts/rtl9301_zyxel_xgs1930-28hp.dts
@@ -176,6 +176,13 @@
 		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
 		los-gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
 	};
+
+	poe_power: regulator-poe {
+		compatible = "regulator-fixed";
+		regulator-name = "poe-power";
+		gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
 };
 
 &gpio0 {
@@ -185,13 +192,6 @@
 		output-high;
 		line-name = "sfp-enable";
 	};
-
-	poe_mcu_enable_hog {
-		gpio-hog;
-		gpios = <19 GPIO_ACTIVE_HIGH>;
-		output-high;
-		line-name = "poe-mcu-enable";
-	};
 };
 
 &i2c_mst1 {
@@ -199,7 +199,44 @@
 
 	i2c0: i2c@0 {
 		reg = <0>;
-		/* PoE MCU sits here at 0x20 */
+
+		pse: ethernet-pse@20 {
+			compatible = "zyxel,xgs1930-28hp-pse", "realtek,pse-mcu-gen2-smbus";
+			reg = <0x20>;
+
+			enable-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+			power-supply = <&poe_power>;
+
+			pse-pis {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				PSE_PI(0)
+				PSE_PI(1)
+				PSE_PI(2)
+				PSE_PI(3)
+				PSE_PI(4)
+				PSE_PI(5)
+				PSE_PI(6)
+				PSE_PI(7)
+				PSE_PI(8)
+				PSE_PI(9)
+				PSE_PI(10)
+				PSE_PI(11)
+				PSE_PI(12)
+				PSE_PI(13)
+				PSE_PI(14)
+				PSE_PI(15)
+				PSE_PI(16)
+				PSE_PI(17)
+				PSE_PI(18)
+				PSE_PI(19)
+				PSE_PI(20)
+				PSE_PI(21)
+				PSE_PI(22)
+				PSE_PI(23)
+			};
+		};
 	};
 };
 
@@ -235,13 +272,6 @@
 			compatible = "realtek,rtl8231-leds";
 			status = "disabled";
 		};
-
-		poe_enable_hog {
-			gpio-hog;
-			gpios = <12 GPIO_ACTIVE_HIGH>;
-			output-high;
-			line-name = "poe-enable";
-		};
 	};
 };
 
@@ -425,3 +455,28 @@
 	nvmem-cells = <&factory_macaddr>;
 	nvmem-cell-names = "mac-address";
 };
+
+&phy0 { pses = <&pse_pi0>; };
+&phy1 { pses = <&pse_pi1>; };
+&phy2 { pses = <&pse_pi2>; };
+&phy3 { pses = <&pse_pi3>; };
+&phy4 { pses = <&pse_pi4>; };
+&phy5 { pses = <&pse_pi5>; };
+&phy6 { pses = <&pse_pi6>; };
+&phy7 { pses = <&pse_pi7>; };
+&phy8 { pses = <&pse_pi8>; };
+&phy9 { pses = <&pse_pi9>; };
+&phy10 { pses = <&pse_pi10>; };
+&phy11 { pses = <&pse_pi11>; };
+&phy12 { pses = <&pse_pi12>; };
+&phy13 { pses = <&pse_pi13>; };
+&phy14 { pses = <&pse_pi14>; };
+&phy15 { pses = <&pse_pi15>; };
+&phy16 { pses = <&pse_pi16>; };
+&phy17 { pses = <&pse_pi17>; };
+&phy18 { pses = <&pse_pi18>; };
+&phy19 { pses = <&pse_pi19>; };
+&phy20 { pses = <&pse_pi20>; };
+&phy21 { pses = <&pse_pi21>; };
+&phy22 { pses = <&pse_pi22>; };
+&phy23 { pses = <&pse_pi23>; };
diff --git a/target/linux/realtek/image/rtl930x.mk b/target/linux/realtek/image/rtl930x.mk
index 434e197edd7..6f2b6a8cf7f 100644
--- a/target/linux/realtek/image/rtl930x.mk
+++ b/target/linux/realtek/image/rtl930x.mk
@@ -336,11 +336,11 @@ TARGET_DEVICES += zyxel_xgs1250-12-b1
 define Device/zyxel_xgs1930-28hp
   SOC := rtl9301
   DEVICE_MODEL := XGS1930-28HP
-  DEVICE_PACKAGES := kmod-hwmon-gpiofan
   FLASH_ADDR := 0xb4260000
   IMAGE_SIZE := 30336k
   ZYNFW_ALIGN := 0x10000
   $(Device/zyxel_zynos)
+  DEVICE_PACKAGES += kmod-hwmon-gpiofan kmod-pse-realtek-mcu-i2c
 endef
 TARGET_DEVICES += zyxel_xgs1930-28hp