From: Paul A. Clarke Date: Thu, 19 Sep 2019 16:58:46 +0000 (-0500) Subject: [powerpc] Rename fegetenv_status to fegetenv_control X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d58efcaa0b15ef33c2ecf19f565fd52184b7d4d9;p=thirdparty%2Fglibc.git [powerpc] Rename fegetenv_status to fegetenv_control fegetenv_status is used variously to retrieve the FPSCR exception enable bits, rounding mode bits, or both. These are referred to as the control bits in the POWER ISA. FPSCR status bits are also returned by the 'mffs' and 'mffsl' instructions, but they are uniformly ignored by all uses of fegetenv_status. Change the name to be reflective of its current and expected use. Reviewed-By: Paul E Murphy --- diff --git a/ChangeLog b/ChangeLog index 5a53b922cb8..d8e1dd5d17e 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,15 @@ +2019-09-27 Paul A. Clarke + + * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_status): Rename to + fegetenv_control. + * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Accommodate + rename of fegetenv_status to fegetenv_control. + * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Likewise. + * sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Likewise. + * sysdeps/powerpc/fpu/fegetmode.c (fegetmode): Likewise. + * sysdeps/powerpc/fpu/fesetenv.c (__fesetenv): Likewise. + * sysdeps/powerpc/fpu/fesetmode.c (fesetmode): Likewise. + 2019-09-27 Paul A. Clarke * sysdeps/powerpc/fpu/fenv_libc.h (__fesetround_inline): Use diff --git a/sysdeps/powerpc/fpu/fedisblxcpt.c b/sysdeps/powerpc/fpu/fedisblxcpt.c index 9780c562925..65fe4313f5e 100644 --- a/sysdeps/powerpc/fpu/fedisblxcpt.c +++ b/sysdeps/powerpc/fpu/fedisblxcpt.c @@ -26,7 +26,7 @@ fedisableexcept (int excepts) int result, new; /* Get current exception mask to return. */ - fe.fenv = curr.fenv = fegetenv_status (); + fe.fenv = curr.fenv = fegetenv_control (); result = fenv_reg_to_exceptions (fe.l); if ((excepts & FE_ALL_INVALID) == FE_ALL_INVALID) diff --git a/sysdeps/powerpc/fpu/feenablxcpt.c b/sysdeps/powerpc/fpu/feenablxcpt.c index 17ef821b47d..d025a44e244 100644 --- a/sysdeps/powerpc/fpu/feenablxcpt.c +++ b/sysdeps/powerpc/fpu/feenablxcpt.c @@ -26,7 +26,7 @@ feenableexcept (int excepts) int result, new; /* Get current exception mask to return. */ - fe.fenv = curr.fenv = fegetenv_status (); + fe.fenv = curr.fenv = fegetenv_control (); result = fenv_reg_to_exceptions (fe.l); if ((excepts & FE_ALL_INVALID) == FE_ALL_INVALID) diff --git a/sysdeps/powerpc/fpu/fegetexcept.c b/sysdeps/powerpc/fpu/fegetexcept.c index 10a37f0d44b..68a67b907e0 100644 --- a/sysdeps/powerpc/fpu/fegetexcept.c +++ b/sysdeps/powerpc/fpu/fegetexcept.c @@ -24,7 +24,7 @@ __fegetexcept (void) { fenv_union_t fe; - fe.fenv = fegetenv_status (); + fe.fenv = fegetenv_control (); return fenv_reg_to_exceptions (fe.l); } diff --git a/sysdeps/powerpc/fpu/fegetmode.c b/sysdeps/powerpc/fpu/fegetmode.c index 466f5b70986..0483128bfd8 100644 --- a/sysdeps/powerpc/fpu/fegetmode.c +++ b/sysdeps/powerpc/fpu/fegetmode.c @@ -21,6 +21,6 @@ int fegetmode (femode_t *modep) { - *modep = fegetenv_status (); + *modep = fegetenv_control (); return 0; } diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h index 4aad7923930..0dc81fc2d3e 100644 --- a/sysdeps/powerpc/fpu/fenv_libc.h +++ b/sysdeps/powerpc/fpu/fenv_libc.h @@ -60,7 +60,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; 'mffs' on architectures older than "power9" because the additional bits set for 'mffsl' are "don't care" for 'mffs'. 'mffs' is a superset of 'mffsl'. */ -#define fegetenv_status() \ +#define fegetenv_control() \ ({register double __fr; \ __asm__ __volatile__ ( \ ".machine push; .machine \"power9\"; mffsl %0; .machine pop" \ @@ -84,7 +84,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; __fr.fenv; \ }) -/* Like fegetenv_status, but also sets the rounding mode. */ +/* Like fegetenv_control, but also sets the rounding mode. */ #ifdef _ARCH_PWR9 #define fegetenv_and_set_rn(rn) __fe_mffscrn (rn) #else @@ -115,7 +115,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden; /* Set the last 2 nibbles of the FPSCR, which contain the exception enables and the rounding mode. - 'fegetenv_status' retrieves these bits by reading the FPSCR. */ + 'fegetenv_control' retrieves these bits by reading the FPSCR. */ #define fesetenv_mode(env) __builtin_mtfsf (0b00000011, (env)); /* This very handy macro: diff --git a/sysdeps/powerpc/fpu/fesetenv.c b/sysdeps/powerpc/fpu/fesetenv.c index f2a0debc1d1..7e0176b65eb 100644 --- a/sysdeps/powerpc/fpu/fesetenv.c +++ b/sysdeps/powerpc/fpu/fesetenv.c @@ -26,7 +26,7 @@ __fesetenv (const fenv_t *envp) /* get the currently set exceptions. */ new.fenv = *envp; - old.fenv = fegetenv_status (); + old.fenv = fegetenv_control (); __TEST_AND_EXIT_NON_STOP (old.l, new.l); __TEST_AND_ENTER_NON_STOP (old.l, new.l); diff --git a/sysdeps/powerpc/fpu/fesetmode.c b/sysdeps/powerpc/fpu/fesetmode.c index c81155ae511..bda22182100 100644 --- a/sysdeps/powerpc/fpu/fesetmode.c +++ b/sysdeps/powerpc/fpu/fesetmode.c @@ -27,7 +27,7 @@ fesetmode (const femode_t *modep) /* Logic regarding enabled exceptions as in fesetenv. */ new.fenv = *modep; - old.fenv = fegetenv_status (); + old.fenv = fegetenv_control (); new.l = (new.l & ~FPSCR_STATUS_MASK) | (old.l & FPSCR_STATUS_MASK); if (old.l == new.l)