From: Jeff Law <jeffreyalaw@gmail.com>
Date: Thu, 3 Aug 2023 14:57:23 +0000 (-0400)
Subject: [committed][RISC-V] Remove errant hunk of code
X-Git-Tag: basepoints/gcc-15~7181
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d61efa3cd3378be38738bfb5139925d1505c1325;p=thirdparty%2Fgcc.git

[committed][RISC-V] Remove errant hunk of code

I'm using this hunk locally to more thoroughly exercise the zicond paths
due to inaccuracies elsewhere in the costing model.  It was never
supposed to be part of the costing commit though.  And as we've seen
it's causing problems with the vector bits.

While my testing isn't complete, this hunk was never supposed to be
pushed and it's causing problems.  So I'm just ripping it out.

There's a bigger TODO in this space WRT a top-to-bottom evaluation of
the costing on RISC-V.  I'm still formulating what that evaluation is
going to look like, so don't hold your breath waiting on it.

Pushed to the trunk.

gcc/

	* config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
	recent commit.
---

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 9e75450aa974..d8fab68dbb4a 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -2913,16 +2913,6 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN
 	}
       return false;
 
-    case SET:
-      /* A simple SET with a register destination takes its cost solely from
-	 the SET_SRC operand.  */
-      if (outer_code == INSN && REG_P (SET_DEST (x)))
-	{
-	  *total = riscv_rtx_costs (SET_SRC (x), mode, SET, opno, total, speed);
-	  return true;
-	}
-      return false;
-
     default:
       return false;
     }