From: Petar Jovanovic <mips32r2@gmail.com>
Date: Fri, 22 Jun 2012 13:44:04 +0000 (+0000)
Subject: Initializing destination reg for MoveIns test for MIPS.
X-Git-Tag: svn/VALGRIND_3_8_0~207
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d69863ecfe10ee79ccae26605056fceb2344142c;p=thirdparty%2Fvalgrind.git

Initializing destination reg for MoveIns test for MIPS.

The test none/tests/mips32/MoveIns.c did not initialize destination register,
and that is important for movn.s and movn.d instructions. This improves the
test as we will get the same stdout with different compilers and options now.


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12661
---

diff --git a/none/tests/mips32/MoveIns.c b/none/tests/mips32/MoveIns.c
index e8cf2ae904..53ec672162 100644
--- a/none/tests/mips32/MoveIns.c
+++ b/none/tests/mips32/MoveIns.c
@@ -214,6 +214,7 @@ unsigned int mem[] = {
      "move $" #RT ", %3\n\t" \
      "move $t0, %2\n\t" \
      "lwc1 $" #FS ", "#offset"($t0)\n\t" \
+     "mtc1 $0, $" #FD "\n\t" \
      instruction "\n\t" \
      "mov.s %0, $" #FD"\n\t" \
      "mfc1 %1, $" #FD"\n\t" \
@@ -234,6 +235,8 @@ unsigned int mem[] = {
      "move $" #RT ", %3\n\t" \
      "move $t0, %2\n\t" \
      "ldc1 $" #FS ", "#offset"($t0)\n\t" \
+     "mtc1 $0, $" #FD "\n\t" \
+     "mtc1 $0, $" #FD + 1"\n\t" \
      instruction "\n\t" \
      "mov.d %0, $" #FD"\n\t" \
      "mfc1 %1, $" #FD"\n\t" \
diff --git a/none/tests/mips32/MoveIns.stdout.exp b/none/tests/mips32/MoveIns.stdout.exp
index b9da230b25..70306eee68 100644
--- a/none/tests/mips32/MoveIns.stdout.exp
+++ b/none/tests/mips32/MoveIns.stdout.exp
@@ -190,36 +190,36 @@ movf.d $f4, $f6, $fcc0 :: out: 0x4095a266 0x66666666, cc: 0
 movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
 movf.d $f4, $f6, $fcc0 :: out: 0x3ff00000 0x0, cc: 0
 MOVN.S
-movn.s $f0, $f2, $t3 :: fs rt 0x1
+movn.s $f0, $f2, $t3 :: fs rt 0x0
 movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
 movn.s $f0, $f2, $t3 :: fs rt 0x40400000
 movn.s $f0, $f2, $t3 :: fs rt 0xbf800000
 movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
+movn.s $f0, $f2, $t3 :: fs rt 0x0
+movn.s $f0, $f2, $t3 :: fs rt 0x0
 movn.s $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
 movn.s $f0, $f2, $t3 :: fs rt 0x44db0000
 movn.s $f0, $f2, $t3 :: fs rt 0x3b210e02
 movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
+movn.s $f0, $f2, $t3 :: fs rt 0x0
+movn.s $f0, $f2, $t3 :: fs rt 0x0
 movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
 movn.s $f0, $f2, $t3 :: fs rt 0x42080079
 movn.s $f0, $f2, $t3 :: fs rt 0x4732da7a
 MOVN.D
-movn.d $f0, $f2, $t3 :: fs rt 0x4732da7a
+movn.d $f0, $f2, $t3 :: fs rt 0x0
 movn.d $f0, $f2, $t3 :: fs rt 0x43e41fde
 movn.d $f0, $f2, $t3 :: fs rt 0x40400000
 movn.d $f0, $f2, $t3 :: fs rt 0xbf800000
 movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
+movn.d $f0, $f2, $t3 :: fs rt 0x0
+movn.d $f0, $f2, $t3 :: fs rt 0x0
 movn.d $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
 movn.d $f0, $f2, $t3 :: fs rt 0x44db0000
 movn.d $f0, $f2, $t3 :: fs rt 0x3b210e02
 movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
+movn.d $f0, $f2, $t3 :: fs rt 0x0
+movn.d $f0, $f2, $t3 :: fs rt 0x0
 movn.d $f0, $f2, $t3 :: fs rt 0x43e41fde
 movn.d $f0, $f2, $t3 :: fs rt 0x42080079
 movn.d $f0, $f2, $t3 :: fs rt 0x4732da7a
@@ -311,15 +311,15 @@ movz.s $f0, $f2, $t3 :: fs rt 0x0
 movz.s $f0, $f2, $t3 :: fs rt 0xc0e96d19
 movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
 movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
 movz.s $f0, $f2, $t3 :: fs rt 0xc872bcb1
 movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
 MOVZ.D
 movz.d $f0, $f2, $t3 :: fs rt 0x0
 movz.d $f0, $f2, $t3 :: fs rt 0x0
@@ -328,12 +328,12 @@ movz.d $f0, $f2, $t3 :: fs rt 0x0
 movz.d $f0, $f2, $t3 :: fs rt 0x0
 movz.d $f0, $f2, $t3 :: fs rt 0xc0e96d19
 movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
 movz.d $f0, $f2, $t3 :: fs rt 0xc872bcb1
 movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
diff --git a/none/tests/mips32/MoveIns.stdout.exp-BE b/none/tests/mips32/MoveIns.stdout.exp-BE
index ee1a16bf7d..2ff43c29b3 100644
--- a/none/tests/mips32/MoveIns.stdout.exp-BE
+++ b/none/tests/mips32/MoveIns.stdout.exp-BE
@@ -190,36 +190,36 @@ movf.d $f4, $f6, $fcc0 :: out: 0x66666666 0x4095a266, cc: 0
 movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
 movf.d $f4, $f6, $fcc0 :: out: 0x0 0x3ff00000, cc: 0
 MOVN.S
-movn.s $f0, $f2, $t3 :: fs rt 0x1
+movn.s $f0, $f2, $t3 :: fs rt 0x0
 movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
 movn.s $f0, $f2, $t3 :: fs rt 0x40400000
 movn.s $f0, $f2, $t3 :: fs rt 0xbf800000
 movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
+movn.s $f0, $f2, $t3 :: fs rt 0x0
+movn.s $f0, $f2, $t3 :: fs rt 0x0
 movn.s $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
 movn.s $f0, $f2, $t3 :: fs rt 0x44db0000
 movn.s $f0, $f2, $t3 :: fs rt 0x3b210e02
 movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
+movn.s $f0, $f2, $t3 :: fs rt 0x0
+movn.s $f0, $f2, $t3 :: fs rt 0x0
 movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
 movn.s $f0, $f2, $t3 :: fs rt 0x42080079
 movn.s $f0, $f2, $t3 :: fs rt 0x4732da7a
 MOVN.D
-movn.d $f0, $f2, $t3 :: fs rt 0x4732da7a
+movn.d $f0, $f2, $t3 :: fs rt 0x0
 movn.d $f0, $f2, $t3 :: fs rt 0x43e41fde
 movn.d $f0, $f2, $t3 :: fs rt 0x40400000
 movn.d $f0, $f2, $t3 :: fs rt 0xbf800000
 movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
+movn.d $f0, $f2, $t3 :: fs rt 0x0
+movn.d $f0, $f2, $t3 :: fs rt 0x0
 movn.d $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
 movn.d $f0, $f2, $t3 :: fs rt 0x44db0000
 movn.d $f0, $f2, $t3 :: fs rt 0x3b210e02
 movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
+movn.d $f0, $f2, $t3 :: fs rt 0x0
+movn.d $f0, $f2, $t3 :: fs rt 0x0
 movn.d $f0, $f2, $t3 :: fs rt 0x43e41fde
 movn.d $f0, $f2, $t3 :: fs rt 0x42080079
 movn.d $f0, $f2, $t3 :: fs rt 0x4732da7a
@@ -311,15 +311,15 @@ movz.s $f0, $f2, $t3 :: fs rt 0x0
 movz.s $f0, $f2, $t3 :: fs rt 0xc0e96d19
 movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
 movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
 movz.s $f0, $f2, $t3 :: fs rt 0xc872bcb1
 movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
 MOVZ.D
 movz.d $f0, $f2, $t3 :: fs rt 0x0
 movz.d $f0, $f2, $t3 :: fs rt 0x0
@@ -328,12 +328,12 @@ movz.d $f0, $f2, $t3 :: fs rt 0x0
 movz.d $f0, $f2, $t3 :: fs rt 0x0
 movz.d $f0, $f2, $t3 :: fs rt 0xc0e96d19
 movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
 movz.d $f0, $f2, $t3 :: fs rt 0xc872bcb1
 movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0