From: Kane Chen Date: Wed, 4 Feb 2026 08:21:25 +0000 (+0000) Subject: hw/arm/aspeed: Attach UART device to AST1700 model X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d75f9e5aca34141c7c0e7e59a5ce12c3855d9e8a;p=thirdparty%2Fqemu.git hw/arm/aspeed: Attach UART device to AST1700 model Connect the UART controller to the AST1700 model by mapping its MMIO region. Signed-off-by: Kane-Chen-AS Reviewed-by: Cédric Le Goater Reviewed-by: Nabih Estefan Tested-by: Nabih Estefan Link: https://lore.kernel.org/qemu-devel/20260204082113.3955407-9-kane_chen@aspeedtech.com Signed-off-by: Cédric Le Goater --- diff --git a/hw/arm/aspeed_ast1700.c b/hw/arm/aspeed_ast1700.c index e4c8565d3f..f610f25932 100644 --- a/hw/arm/aspeed_ast1700.c +++ b/hw/arm/aspeed_ast1700.c @@ -9,15 +9,18 @@ #include "qemu/osdep.h" #include "hw/core/boards.h" #include "qom/object.h" +#include "hw/core/qdev-properties.h" #include "hw/arm/aspeed_ast1700.h" #define AST2700_SOC_LTPI_SIZE 0x01000000 enum { + ASPEED_AST1700_DEV_UART12, ASPEED_AST1700_DEV_LTPI_CTRL, }; static const hwaddr aspeed_ast1700_io_memmap[] = { + [ASPEED_AST1700_DEV_UART12] = 0x00C33B00, [ASPEED_AST1700_DEV_LTPI_CTRL] = 0x00C34000, }; @@ -31,6 +34,17 @@ static void aspeed_ast1700_realize(DeviceState *dev, Error **errp) AST2700_SOC_LTPI_SIZE); sysbus_init_mmio(sbd, &s->iomem); + /* UART */ + qdev_prop_set_uint8(DEVICE(&s->uart), "regshift", 2); + qdev_prop_set_uint32(DEVICE(&s->uart), "baudbase", 38400); + qdev_prop_set_uint8(DEVICE(&s->uart), "endianness", DEVICE_LITTLE_ENDIAN); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) { + return; + } + memory_region_add_subregion(&s->iomem, + aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_UART12], + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0)); + /* LTPI controller */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->ltpi), errp)) { return; @@ -44,6 +58,10 @@ static void aspeed_ast1700_instance_init(Object *obj) { AspeedAST1700SoCState *s = ASPEED_AST1700(obj); + /* UART */ + object_initialize_child(obj, "uart", &s->uart, + TYPE_SERIAL_MM); + /* LTPI controller */ object_initialize_child(obj, "ltpi-ctrl", &s->ltpi, TYPE_ASPEED_LTPI); diff --git a/include/hw/arm/aspeed_ast1700.h b/include/hw/arm/aspeed_ast1700.h index addea3ab1f..b15b13aedd 100644 --- a/include/hw/arm/aspeed_ast1700.h +++ b/include/hw/arm/aspeed_ast1700.h @@ -10,6 +10,7 @@ #include "hw/core/sysbus.h" #include "hw/misc/aspeed_ltpi.h" +#include "hw/char/serial-mm.h" #define TYPE_ASPEED_AST1700 "aspeed.ast1700" @@ -21,6 +22,7 @@ struct AspeedAST1700SoCState { MemoryRegion iomem; AspeedLTPIState ltpi; + SerialMM uart; }; #endif /* ASPEED_AST1700_H */