From: Niklas Söderlund Date: Tue, 14 Jan 2025 18:30:04 +0000 (+0100) Subject: clk: renesas: r8a779g0: Add ISP core clocks X-Git-Tag: v6.15-rc1~103^2~2^2~1^2~12 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d871a94062a3a32510b503df58ed60fd86f2b14f;p=thirdparty%2Fkernel%2Flinux.git clk: renesas: r8a779g0: Add ISP core clocks Add the ISP core modules clock for Renesas R-Car V4H. Signed-off-by: Niklas Söderlund Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250114183005.2761213-3-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index d45571096b963..015b9773cc55f 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -163,6 +163,8 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { + DEF_MOD("isp0", 16, R8A779G0_CLK_S0D2_VIO), + DEF_MOD("isp1", 17, R8A779G0_CLK_S0D2_VIO), DEF_MOD("avb0", 211, R8A779G0_CLK_S0D4_HSC), DEF_MOD("avb1", 212, R8A779G0_CLK_S0D4_HSC), DEF_MOD("avb2", 213, R8A779G0_CLK_S0D4_HSC),