From: Vladimir Zapolskiy <vz@mleia.com>
Date: Wed, 24 Dec 2025 16:58:45 +0000 (+0200)
Subject: ARM: dts: lpc32xx: describe FLASH_INT of SLC NAND controller
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=d8bb9ef26e9c223c2113d08d89c2f912b22d518a;p=thirdparty%2Fkernel%2Flinux.git

ARM: dts: lpc32xx: describe FLASH_INT of SLC NAND controller

SLC and MLC NAND flash controllers fire the muxed interrupt FLASH_INT to
the SoC, add the interrupt property to the SLC device tree node.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
---

diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
index 3d5a59b2886c2..5ddaea8c481a7 100644
--- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
@@ -65,6 +65,7 @@
 		slc: nand-controller@20020000 {
 			compatible = "nxp,lpc3220-slc";
 			reg = <0x20020000 0x1000>;
+			interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clk LPC32XX_CLK_SLC>;
 			status = "disabled";
 		};