From: Ulrich Weigand <uweigand@de.ibm.com>
Date: Mon, 25 Aug 2003 21:11:46 +0000 (+0000)
Subject: combine.c (simplify_comparison): Re-enable widening of comparisons with non-paradoxic... 
X-Git-Tag: releases/gcc-3.4.0~4076
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=dc5c3188aa4570a39f45540a5e2c823aebb38ff3;p=thirdparty%2Fgcc.git

combine.c (simplify_comparison): Re-enable widening of comparisons with non-paradoxical subregs of non-REG...

	* combine.c (simplify_comparison): Re-enable widening of comparisons
	with non-paradoxical subregs of non-REG expressions.

From-SVN: r70785
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a2bca73dbc99..e23a0e2e6c0f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2003-08-25  Ulrich Weigand  <uweigand@de.ibm.com>
+
+	* combine.c (simplify_comparison): Re-enable widening of comparisons
+	with non-paradoxical subregs of non-REG expressions.
+
 2003-08-25  Ulrich Weigand  <uweigand@de.ibm.com>
 
 	* combine.c (distribute_notes): Handle REG_ALWAYS_RETURN.
diff --git a/gcc/combine.c b/gcc/combine.c
index afa25b0357d0..cc7c7de156e2 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -11277,9 +11277,6 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
   op1 = make_compound_operation (op1, SET);
 
   if (GET_CODE (op0) == SUBREG && subreg_lowpart_p (op0)
-      /* Case 3 above, to sometimes allow (subreg (mem x)), isn't
-	 implemented.  */
-      && GET_CODE (SUBREG_REG (op0)) == REG
       && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
       && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op0))) == MODE_INT
       && (code == NE || code == EQ))
@@ -11287,8 +11284,13 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
       if (GET_MODE_SIZE (GET_MODE (op0))
 	  > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))
 	{
-	  op0 = SUBREG_REG (op0);
-	  op1 = gen_lowpart_for_combine (GET_MODE (op0), op1);
+	  /* For paradoxical subregs, allow case 1 as above.  Case 3 isn't
+	     implemented.  */
+          if (GET_CODE (SUBREG_REG (op0)) == REG)
+	    {
+	      op0 = SUBREG_REG (op0);
+	      op1 = gen_lowpart_for_combine (GET_MODE (op0), op1);
+	    }
 	}
       else if ((GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
 		<= HOST_BITS_PER_WIDE_INT)