From: Aaron Sawdey <acsawdey@linux.ibm.com>
Date: Tue, 6 Nov 2018 21:21:10 +0000 (+0000)
Subject: rs6000.md (bswap<mode>2): Force address into register if not in indexed or indirect... 
X-Git-Tag: basepoints/gcc-10~3275
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=dd1501c5ab12b94f986d7c9ea55f8b3c0c7383c6;p=thirdparty%2Fgcc.git

rs6000.md (bswap<mode>2): Force address into register if not in indexed or indirect form.

2018-11-06  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/rs6000.md (bswap<mode>2): Force address into register
	if not in indexed or indirect form.
	(bswap<mode>2_load): Change predicate to indexed_or_indirect_operand.
	(bswap<mode>2_store): Ditto.

From-SVN: r265852
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 98ecacf05da9..0c33c678a70c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2018-11-06  Aaron Sawdey  <acsawdey@linux.ibm.com>
+
+	* config/rs6000/rs6000.md (bswap<mode>2): Force address into register
+	if not in indexed or indirect form.
+	(bswap<mode>2_load): Change predicate to indexed_or_indirect_operand.
+	(bswap<mode>2_store): Ditto.
+
 2018-11-06  Richard Earnshaw  <rearnsha@arm.com>
 
 	* config/aarch64/aarch64.md (speculation_tracker): Set the mode for
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 2b0538c1247d..66742f66a89b 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -2411,9 +2411,15 @@
     src = force_reg (<MODE>mode, src);
 
   if (MEM_P (src))
-    emit_insn (gen_bswap<mode>2_load (dest, src));
+    {
+      src = rs6000_force_indexed_or_indirect_mem (src);
+      emit_insn (gen_bswap<mode>2_load (dest, src));
+    }
   else if (MEM_P (dest))
-    emit_insn (gen_bswap<mode>2_store (dest, src));
+    {
+      dest = rs6000_force_indexed_or_indirect_mem (dest);
+      emit_insn (gen_bswap<mode>2_store (dest, src));
+    }
   else
     emit_insn (gen_bswap<mode>2_reg (dest, src));
   DONE;
@@ -2421,13 +2427,13 @@
 
 (define_insn "bswap<mode>2_load"
   [(set (match_operand:HSI 0 "gpc_reg_operand" "=r")
-	(bswap:HSI (match_operand:HSI 1 "memory_operand" "Z")))]
+	(bswap:HSI (match_operand:HSI 1 "indexed_or_indirect_operand" "Z")))]
   ""
   "l<wd>brx %0,%y1"
   [(set_attr "type" "load")])
 
 (define_insn "bswap<mode>2_store"
-  [(set (match_operand:HSI 0 "memory_operand" "=Z")
+  [(set (match_operand:HSI 0 "indexed_or_indirect_operand" "=Z")
 	(bswap:HSI (match_operand:HSI 1 "gpc_reg_operand" "r")))]
   ""
   "st<wd>brx %1,%y0"