From: Richard Zhu Date: Wed, 15 Oct 2025 03:04:18 +0000 (+0800) Subject: arm64: dts: imx95-15x15-evk: Add supports-clkreq property to PCIe M.2 port X-Git-Tag: v6.19-rc1~100^2~20^2~80 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=dd93ee01a5056876be537b5bbb4a4a646b50982b;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: imx95-15x15-evk: Add supports-clkreq property to PCIe M.2 port According to PCIe r6.1, sec 5.5.1. The following rules define how the L1.1 and L1.2 substates are entered: Both the Upstream and Downstream Ports must monitor the logical state of the CLKREQ# signal. Typical implement is using open drain, which connect RC's clkreq# to EP's clkreq# together and pull up clkreq#. imx95-15x15-evk matches this requirement, so add supports-clkreq to allow PCIe device enter ASPM L1 Sub-State. Signed-off-by: Richard Zhu Reviewed-by: Frank Li Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts index 0953c25ef5576..373e1f96ed9c4 100644 --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts @@ -557,6 +557,7 @@ pinctrl-names = "default"; reset-gpio = <&gpio5 13 GPIO_ACTIVE_LOW>; vpcie-supply = <®_m2_pwr>; + supports-clkreq; status = "okay"; };