From: Thomas Preud'homme <thomas.preudhomme@arm.com>
Date: Tue, 17 Jan 2017 10:11:20 +0000 (+0000)
Subject: backport: re PR rtl-optimization/78617 (LRA clobbers live register during remateriali... 
X-Git-Tag: releases/gcc-5.5.0~581
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ddb7cdcc7fb3af645fdd945f17ed73919b4acb78;p=thirdparty%2Fgcc.git

backport: re PR rtl-optimization/78617 (LRA clobbers live register during rematerialization)

2017-01-17 Thomas Preud'homme <thomas.preudhomme@arm.com>

    Backport from mainline
    2016-12-07 Thomas Preud'homme <thomas.preudhomme@arm.com>

    gcc/
    PR rtl-optimization/78617
    * lra-remat.c (do_remat): Initialize live_hard_regs from live in
    registers, also setting hard registers mapped to pseudo registers.

    gcc/testsuite/
    PR rtl-optimization/78617
    * gcc.c-torture/execute/pr78617.c: New test.

From-SVN: r244526
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1a56b1c5d072..2dc5f06ff300 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2017-01-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+	Backport from mainline
+	2016-12-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+	PR rtl-optimization/78617
+	* lra-remat.c (do_remat): Initialize live_hard_regs from live in
+	registers, also setting hard registers mapped to pseudo registers.
+
 2017-01-11  Christophe Lyon  <christophe.lyon@linaro.org>
 
 	Backport from mainline r244320.
diff --git a/gcc/lra-remat.c b/gcc/lra-remat.c
index 5e5d62c50b01..17da91b7f214 100644
--- a/gcc/lra-remat.c
+++ b/gcc/lra-remat.c
@@ -1124,6 +1124,7 @@ update_scratch_ops (rtx_insn *remat_insn)
 static bool
 do_remat (void)
 {
+  unsigned regno;
   rtx_insn *insn;
   basic_block bb;
   bitmap_head avail_cands;
@@ -1131,12 +1132,21 @@ do_remat (void)
   bool changed_p = false;
   /* Living hard regs and hard registers of living pseudos.  */
   HARD_REG_SET live_hard_regs;
+  bitmap_iterator bi;
 
   bitmap_initialize (&avail_cands, &reg_obstack);
   bitmap_initialize (&active_cands, &reg_obstack);
   FOR_EACH_BB_FN (bb, cfun)
     {
-      REG_SET_TO_HARD_REG_SET (live_hard_regs, df_get_live_out (bb));
+      CLEAR_HARD_REG_SET (live_hard_regs);
+      EXECUTE_IF_SET_IN_BITMAP (df_get_live_in (bb), 0, regno, bi)
+	{
+	  int hard_regno = regno < FIRST_PSEUDO_REGISTER
+			   ? regno
+			   : reg_renumber[regno];
+	  if (hard_regno >= 0)
+	    SET_HARD_REG_BIT (live_hard_regs, hard_regno);
+	}
       bitmap_and (&avail_cands, &get_remat_bb_data (bb)->avin_cands,
 		  &get_remat_bb_data (bb)->livein_cands);
       /* Activating insns are always in the same block as their corresponding
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0b7c3da7d5ab..049dfcf7dc94 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2017-01-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+	Backport from mainline
+	2016-12-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+	PR rtl-optimization/78617
+	* gcc.c-torture/execute/pr78617.c: New test.
+
 2017-01-12  Nathan Sidwell  <nathan@acm.org>
 
 	PR c++/77812
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr78617.c b/gcc/testsuite/gcc.c-torture/execute/pr78617.c
new file mode 100644
index 000000000000..89c4f6dea8cb
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr78617.c
@@ -0,0 +1,25 @@
+int a = 0;
+int d = 1;
+int f = 1;
+
+int fn1() {
+  return a || 1 >> a;
+}
+
+int fn2(int p1, int p2) {
+  return p2 >= 2 ? p1 : p1 >> 1;
+}
+
+int fn3(int p1) {
+  return d ^ p1;
+}
+
+int fn4(int p1, int p2) {
+  return fn3(!d > fn2((f = fn1() - 1000) || p2, p1));
+}
+
+int main() {
+  if (fn4(0, 0) != 1)
+    __builtin_abort ();
+  return 0;
+}