From: Dmitry Baryshkov Date: Mon, 20 Jun 2022 07:19:34 +0000 (+0300) Subject: arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodes X-Git-Tag: v5.15.165~10 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=dde07b87e84bed54aa8c4d026abe403d7492935b;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodes commit b874fff9a7683df30e5aff16d5a85b1f8a43aa5d upstream. The commit 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node") moved the '#clock-cells' properties to the child nodes. However it missed the fact that the property must have been set to <0> (as all pipe clocks use of_clk_hw_simple_get as the xlate function. Also the mentioned commit didn't add '#clock-cells' properties to second and third PCIe PHY nodes. Correct both these mistakes: - Set '#clock-cells' to <0>, - Add the property to pciephy_1 and pciephy_2 nodes. Fixes: 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node") Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220620071936.1558906-3-dmitry.baryshkov@linaro.org Signed-off-by: Greg Kroah-Hartman --- diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 9b74cf57b6d1c..9ee8eebfcdb51 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -636,7 +636,7 @@ <0x00035400 0x1dc>; #phy-cells = <0>; - #clock-cells = <1>; + #clock-cells = <0>; clock-output-names = "pcie_0_pipe_clk_src"; clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; clock-names = "pipe0"; @@ -650,6 +650,7 @@ <0x00036400 0x1dc>; #phy-cells = <0>; + #clock-cells = <0>; clock-output-names = "pcie_1_pipe_clk_src"; clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; clock-names = "pipe1"; @@ -663,6 +664,7 @@ <0x00037400 0x1dc>; #phy-cells = <0>; + #clock-cells = <0>; clock-output-names = "pcie_2_pipe_clk_src"; clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; clock-names = "pipe2"; @@ -2662,7 +2664,7 @@ <0x07410600 0x1a8>; #phy-cells = <0>; - #clock-cells = <1>; + #clock-cells = <0>; clock-output-names = "usb3_phy_pipe_clk_src"; clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>; clock-names = "pipe0";